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Thu, 09 Oct 2025 06:26:15 -0700 (PDT) Received: from smtpclient.apple ([2a02:6bf:8011:f00:6191:211a:2507:cf35]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-375f39fca47sm28419641fa.16.2025.10.09.06.26.14 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 Oct 2025 06:26:15 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3776.700.51.11.2\)) Subject: Re: [PATCH] hw/arm: add pvpanic mmio device for arm From: Alexander Gryanko In-Reply-To: <20251007151157.5a601c3e@fedora> Date: Thu, 9 Oct 2025 16:25:59 +0300 Cc: qemu-devel@nongnu.org, Peter Maydell , qemu-arm@nongnu.org, qemu-trivial@nongnu.org Content-Transfer-Encoding: quoted-printable Message-Id: References: <20251007151157.5a601c3e@fedora> To: Igor Mammedov X-Mailer: Apple Mail (2.3776.700.51.11.2) Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=xpahos@gmail.com; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org > On 7 Oct 2025, at 16:11, Igor Mammedov wrote: >=20 > On Sat, 4 Oct 2025 23:19:09 +0300 > Alexander Gryanko wrote: >=20 >> Currently, pvpanic is available in three device types: ISA, >> MMIO, and PCI. For early stages of system initialisation >> before PCI enumeration, only ISA and MMIO are suitable. >> ISA is specific to the x86 platform; only MMIO devices >> can be used for ARM. It is not possible to specify a >> device as on the x86 platform (-device pvpanic); the >=20 > perhaps ARM folsk know better, don't we have some > user create-able sysbus devices? Can it be implemented > as such, so we would avoid creating built-in device? As a QEMU user, I expected there to be a way to specify a dtb from a = file that could be used as the actual device tree inside the virtual = machine. Perhaps there is a way to do this, but I am not very familiar = with the QEMU code and do not know how it should work. >=20 >> only possible way is to add an MMIO device to the dtb, >> which can be implemented by manually adding new functions >> to the QEMU code, as was done in the VMApple implementation. >>=20 >> Signed-off-by: Alexander Gryanko >> --- >> hw/arm/virt.c | 25 +++++++++++++++++++++++++ >> include/hw/arm/virt.h | 1 + >> 2 files changed, 26 insertions(+) >>=20 >> diff --git a/hw/arm/virt.c b/hw/arm/virt.c >> index 02209fadcf..1059584b67 100644 >> --- a/hw/arm/virt.c >> +++ b/hw/arm/virt.c >> @@ -39,6 +39,7 @@ >> #include "hw/arm/virt.h" >> #include "hw/block/flash.h" >> #include "hw/display/ramfb.h" >> +#include "hw/misc/pvpanic.h" >> #include "net/net.h" >> #include "system/device_tree.h" >> #include "system/numa.h" >> @@ -182,6 +183,7 @@ static const MemMapEntry base_memmap[] =3D { >> [VIRT_UART0] =3D { 0x09000000, 0x00001000 }, >> [VIRT_RTC] =3D { 0x09010000, 0x00001000 }, >> [VIRT_FW_CFG] =3D { 0x09020000, 0x00000018 }, >> + [VIRT_PVPANIC] =3D { 0x09021000, 0x00000002 }, >> [VIRT_GPIO] =3D { 0x09030000, 0x00001000 }, >> [VIRT_UART1] =3D { 0x09040000, 0x00001000 }, >> [VIRT_SMMU] =3D { 0x09050000, SMMU_IO_LEN }, >> @@ -276,6 +278,27 @@ static bool ns_el2_virt_timer_present(void) >> arm_feature(env, ARM_FEATURE_EL2) && cpu_isar_feature(aa64_vh, = cpu); >> } >>=20 >> +static void create_pvpanic(VirtMachineState *vms) >> +{ >> + char *nodename; >> + MachineState *ms =3D MACHINE(vms); >> + DeviceState *dev =3D qdev_new(TYPE_PVPANIC_MMIO_DEVICE); >> + SysBusDevice *s =3D SYS_BUS_DEVICE(dev); >> + >> + hwaddr base =3D vms->memmap[VIRT_PVPANIC].base; >> + hwaddr size =3D vms->memmap[VIRT_PVPANIC].size; >> + >> + sysbus_realize_and_unref(s, &error_fatal); >> + sysbus_mmio_map(s, 0, base); >> + >> + nodename =3D g_strdup_printf("/pvpanic@%" PRIx64, base); >> + qemu_fdt_add_subnode(ms->fdt, nodename); >> + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", >> + "qemu,pvpanic-mmio"); >> + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", >> + 2, base, 2, size); >> +} >> + >> static void create_fdt(VirtMachineState *vms) >> { >> MachineState *ms =3D MACHINE(vms); >> @@ -2498,6 +2521,8 @@ static void machvirt_init(MachineState = *machine) >> create_pcie(vms); >> create_cxl_host_reg_region(vms); >>=20 >> + create_pvpanic(vms); >=20 > given that virt is versioned machine type, > we probably need a compat knob to disable it's creation on old machine = types >=20 >> + >> if (has_ged && aarch64 && firmware_loaded && = virt_is_acpi_enabled(vms)) { >> vms->acpi_dev =3D create_acpi_ged(vms); >> } else { >> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h >> index ea2cff05b0..39bf07c9c1 100644 >> --- a/include/hw/arm/virt.h >> +++ b/include/hw/arm/virt.h >> @@ -81,6 +81,7 @@ enum { >> VIRT_NVDIMM_ACPI, >> VIRT_PVTIME, >> VIRT_ACPI_PCIHP, >> + VIRT_PVPANIC, >> VIRT_LOWMEMMAP_LAST, >> }; >>=20 >>=20 >> --- >> base-commit: bd6aa0d1e59d71218c3eee055bc8d222c6e1a628 >> change-id: 20251004-arm-pvpanic-84a7d7b67d8d >>=20 >> Best regards, >=20