From: Fabrice Bellard <fabrice.bellard@free.fr>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] qemu/target-ppc cpu.h op.c translate.c op_templ...
Date: Sun, 23 Nov 2003 11:58:08 -0500 [thread overview]
Message-ID: <E1ANxYm-0006DX-Cp@subversions.gnu.org> (raw)
CVSROOT: /cvsroot/qemu
Module name: qemu
Branch:
Changes by: Fabrice Bellard <fabrice.bellard@free.fr> 03/11/23 11:58:08
Modified files:
target-ppc : cpu.h op.c translate.c
Added files:
target-ppc : op_template.h
Removed files:
target-ppc : op.tpl
Log message:
suppressed use of gen_multi - use intermediate FT0 register for floats - use T0 temporary for fpscr update - use PARAM1 for spr access - added untested single load/store support
CVSWeb URLs:
http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/target-ppc/op_template.h?rev=1.1
http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/target-ppc/cpu.h.diff?tr1=1.1&tr2=1.2&r1=text&r2=text
http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/target-ppc/op.c.diff?tr1=1.1&tr2=1.2&r1=text&r2=text
http://savannah.gnu.org/cgi-bin/viewcvs/qemu/qemu/target-ppc/translate.c.diff?tr1=1.1&tr2=1.2&r1=text&r2=text
reply other threads:[~2003-11-23 18:02 UTC|newest]
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