From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1FqUdF-0002ye-9u for qemu-devel@nongnu.org; Wed, 14 Jun 2006 08:38:01 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1FqUdE-0002xV-F4 for qemu-devel@nongnu.org; Wed, 14 Jun 2006 08:38:00 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1FqUdE-0002xJ-AQ for qemu-devel@nongnu.org; Wed, 14 Jun 2006 08:38:00 -0400 Received: from [199.232.41.3] (helo=savannah.gnu.org) by monty-python.gnu.org with esmtp (Exim 4.52) id 1FqUmO-0002l1-FQ for qemu-devel@nongnu.org; Wed, 14 Jun 2006 08:47:28 -0400 Received: from savannah.gnu.org ([127.0.0.1]) by savannah.gnu.org with esmtp (Exim 3.36 #1 (Debian)) id 1FqUdC-0005kZ-00 for ; Wed, 14 Jun 2006 08:37:58 -0400 Received: from bellard by savannah.gnu.org with local (Exim 4.50) id 1FqUdC-0005kO-IA for qemu-devel@nongnu.org; Wed, 14 Jun 2006 12:37:58 +0000 Message-Id: From: Fabrice Bellard Date: Wed, 14 Jun 2006 12:37:58 +0000 Subject: [Qemu-devel] qemu/target-sparc translate.c Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org CVSROOT: /sources/qemu Module name: qemu Changes by: Fabrice Bellard 06/06/14 12:37:58 Modified files: target-sparc : translate.c Log message: FPU fix (Joerg Platte) CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-sparc/translate.c?cvsroot=qemu&r1=1.25&r2=1.26 Patches: Index: translate.c =================================================================== RCS file: /sources/qemu/qemu/target-sparc/translate.c,v retrieving revision 1.25 retrieving revision 1.26 diff -u -b -r1.25 -r1.26 --- translate.c 21 Nov 2005 23:33:12 -0000 1.25 +++ translate.c 14 Jun 2006 12:37:58 -0000 1.26 @@ -982,6 +982,7 @@ { int cc = GET_FIELD_SP(insn, 20, 21); #if !defined(CONFIG_USER_ONLY) + save_state(dc); gen_op_trap_ifnofpu(); #endif target = GET_FIELD_SP(insn, 0, 18); @@ -1002,6 +1003,7 @@ case 0x6: /* FBN+x */ { #if !defined(CONFIG_USER_ONLY) + save_state(dc); gen_op_trap_ifnofpu(); #endif target = GET_FIELD(insn, 10, 31); @@ -1236,6 +1238,7 @@ #endif } else if (xop == 0x34) { /* FPU Operations */ #if !defined(CONFIG_USER_ONLY) + save_state(dc); gen_op_trap_ifnofpu(); #endif rs1 = GET_FIELD(insn, 13, 17); @@ -1424,6 +1427,7 @@ int cond; #endif #if !defined(CONFIG_USER_ONLY) + save_state(dc); gen_op_trap_ifnofpu(); #endif rs1 = GET_FIELD(insn, 13, 17); @@ -2346,6 +2350,7 @@ #endif } else if (xop >= 0x20 && xop < 0x24) { #if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64) + save_state(dc); gen_op_trap_ifnofpu(); #endif switch (xop) {