* [Qemu-devel] qemu cpu-exec.c gdbstub.c linux-user/main.c tar...
@ 2006-06-18 19:12 Paul Brook
0 siblings, 0 replies; only message in thread
From: Paul Brook @ 2006-06-18 19:12 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Paul Brook <pbrook> 06/06/18 19:12:54
Modified files:
. : cpu-exec.c gdbstub.c
linux-user : main.c
target-sh4 : cpu.h exec.h op.c translate.c
Log message:
SH bugfixes.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/cpu-exec.c?cvsroot=qemu&r1=1.81&r2=1.82
http://cvs.savannah.gnu.org/viewcvs/qemu/gdbstub.c?cvsroot=qemu&r1=1.38&r2=1.39
http://cvs.savannah.gnu.org/viewcvs/qemu/linux-user/main.c?cvsroot=qemu&r1=1.87&r2=1.88
http://cvs.savannah.gnu.org/viewcvs/qemu/target-sh4/cpu.h?cvsroot=qemu&r1=1.2&r2=1.3
http://cvs.savannah.gnu.org/viewcvs/qemu/target-sh4/exec.h?cvsroot=qemu&r1=1.2&r2=1.3
http://cvs.savannah.gnu.org/viewcvs/qemu/target-sh4/op.c?cvsroot=qemu&r1=1.2&r2=1.3
http://cvs.savannah.gnu.org/viewcvs/qemu/target-sh4/translate.c?cvsroot=qemu&r1=1.5&r2=1.6
Patches:
Index: cpu-exec.c
===================================================================
RCS file: /sources/qemu/qemu/cpu-exec.c,v
retrieving revision 1.81
retrieving revision 1.82
diff -u -b -r1.81 -r1.82
--- cpu-exec.c 17 Jun 2006 19:58:24 -0000 1.81
+++ cpu-exec.c 18 Jun 2006 19:12:54 -0000 1.82
@@ -47,7 +47,7 @@
longjmp(env->jmp_env, 1);
}
#endif
-#ifndef TARGET_SPARC
+#if !(defined(TARGET_SPARC) || defined(TARGET_SH4))
#define reg_T2
#endif
Index: gdbstub.c
===================================================================
RCS file: /sources/qemu/qemu/gdbstub.c,v
retrieving revision 1.38
retrieving revision 1.39
diff -u -b -r1.38 -r1.39
--- gdbstub.c 17 Jun 2006 18:30:42 -0000 1.38
+++ gdbstub.c 18 Jun 2006 19:12:54 -0000 1.39
@@ -504,7 +504,12 @@
int i;
#define SAVE(x) *ptr++=tswapl(x)
- for (i = 0; i < 16; i++) SAVE(env->gregs[i]);
+ if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
+ for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
+ } else {
+ for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
+ }
+ for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
SAVE (env->pc);
SAVE (env->pr);
SAVE (env->gbr);
@@ -527,7 +532,12 @@
int i;
#define LOAD(x) (x)=*ptr++;
- for (i = 0; i < 16; i++) LOAD(env->gregs[i]);
+ if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
+ for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
+ } else {
+ for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
+ }
+ for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
LOAD (env->pc);
LOAD (env->pr);
LOAD (env->gbr);
Index: linux-user/main.c
===================================================================
RCS file: /sources/qemu/qemu/linux-user/main.c,v
retrieving revision 1.87
retrieving revision 1.88
diff -u -b -r1.87 -r1.88
--- linux-user/main.c 17 Jun 2006 19:58:24 -0000 1.87
+++ linux-user/main.c 18 Jun 2006 19:12:54 -0000 1.88
@@ -1370,14 +1370,14 @@
switch (trapnr) {
case 0x160:
ret = do_syscall(env,
- env->gregs[0x13],
- env->gregs[0x14],
- env->gregs[0x15],
- env->gregs[0x16],
- env->gregs[0x17],
- env->gregs[0x10],
+ env->gregs[3],
+ env->gregs[4],
+ env->gregs[5],
+ env->gregs[6],
+ env->gregs[7],
+ env->gregs[0],
0);
- env->gregs[0x10] = ret;
+ env->gregs[0] = ret;
env->pc += 2;
break;
case EXCP_DEBUG:
Index: target-sh4/cpu.h
===================================================================
RCS file: /sources/qemu/qemu/target-sh4/cpu.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -b -r1.2 -r1.3
--- target-sh4/cpu.h 14 Jun 2006 15:02:05 -0000 1.2
+++ target-sh4/cpu.h 18 Jun 2006 19:12:54 -0000 1.3
@@ -45,7 +45,9 @@
#define FPSCR_PR (1 << 19)
#define FPSCR_DN (1 << 18)
-#define DELAY_SLOT (1 << 0)
+#define DELAY_SLOT (1 << 0) /* Must be the same as SR_T. */
+/* This flag is set if the next insn is a delay slot for a conditional jump.
+ The dynamic value of the DELAY_SLOT determines whether the jup is taken. */
#define DELAY_SLOT_CONDITIONAL (1 << 1)
/* Those are used in contexts only */
#define BRANCH (1 << 2)
Index: target-sh4/exec.h
===================================================================
RCS file: /sources/qemu/qemu/target-sh4/exec.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -b -r1.2 -r1.3
--- target-sh4/exec.h 14 Jun 2006 15:02:05 -0000 1.2
+++ target-sh4/exec.h 18 Jun 2006 19:12:54 -0000 1.3
@@ -26,7 +26,7 @@
register struct CPUSH4State *env asm(AREG0);
register uint32_t T0 asm(AREG1);
register uint32_t T1 asm(AREG2);
-register uint32_t T2 asm(AREG3);
+//register uint32_t T2 asm(AREG3);
#define FT0 (env->ft0)
#define FT1 (env->ft1)
Index: target-sh4/op.c
===================================================================
RCS file: /sources/qemu/qemu/target-sh4/op.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -b -r1.2 -r1.3
--- target-sh4/op.c 14 Jun 2006 15:02:05 -0000 1.2
+++ target-sh4/op.c 18 Jun 2006 19:12:54 -0000 1.3
@@ -109,17 +109,15 @@
void OPPROTO op_bf_s(void)
{
- T2 = ~env->sr;
env->delayed_pc = PARAM1;
- set_flag(DELAY_SLOT_CONDITIONAL);
+ set_flag(DELAY_SLOT_CONDITIONAL | ((~env->sr) & SR_T));
RETURN();
}
void OPPROTO op_bt_s(void)
{
- T2 = env->sr;
env->delayed_pc = PARAM1;
- set_flag(DELAY_SLOT_CONDITIONAL);
+ set_flag(DELAY_SLOT_CONDITIONAL | (env->sr & SR_T));
RETURN();
}
@@ -888,9 +886,12 @@
RETURN();
}
-void OPPROTO op_jTT2(void)
+void OPPROTO op_jdelayed(void)
{
- if (T2 & SR_T)
+ uint32_t flags;
+ flags = env->flags;
+ env->flags &= ~(DELAY_SLOT | DELAY_SLOT_CONDITIONAL);
+ if (flags & DELAY_SLOT)
GOTO_LABEL_PARAM(1);
RETURN();
}
Index: target-sh4/translate.c
===================================================================
RCS file: /sources/qemu/qemu/target-sh4/translate.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -b -r1.5 -r1.6
--- target-sh4/translate.c 17 Jun 2006 20:04:26 -0000 1.5
+++ target-sh4/translate.c 18 Jun 2006 19:12:54 -0000 1.6
@@ -124,7 +124,11 @@
void cpu_sh4_reset(CPUSH4State * env)
{
+#if defined(CONFIG_USER_ONLY)
+ env->sr = 0x00000000;
+#else
env->sr = 0x700000F0; /* MD, RB, BL, I3-I0 */
+#endif
env->vbr = 0;
env->pc = 0xA0000000;
env->fpscr = 0x00040001;
@@ -209,10 +213,10 @@
int l1;
l1 = gen_new_label();
- gen_op_jTT2(l1);
- gen_goto_tb(ctx, 0, ctx->pc);
+ gen_op_jdelayed(l1);
+ gen_goto_tb(ctx, 1, ctx->pc);
gen_set_label(l1);
- gen_goto_tb(ctx, 1, ctx->delayed_pc);
+ gen_jump(ctx);
}
#define B3_0 (ctx->opcode & 0xf)
@@ -1160,26 +1164,16 @@
#endif
}
- switch (old_flags & (DELAY_SLOT_CONDITIONAL | DELAY_SLOT)) {
- case DELAY_SLOT_CONDITIONAL:
- gen_op_clr_delay_slot_conditional();
+ if (old_flags & DELAY_SLOT_CONDITIONAL) {
gen_delayed_conditional_jump(&ctx);
- break;
- case DELAY_SLOT:
+ } else if (old_flags & DELAY_SLOT) {
gen_op_clr_delay_slot();
gen_jump(&ctx);
- break;
- case 0:
- if (ctx.flags & BRANCH_EXCEPTION) {
+ } else if (ctx.flags & BRANCH_EXCEPTION) {
gen_jump_exception(&ctx);
} else if ((ctx.flags & (BRANCH | BRANCH_CONDITIONAL)) == 0) {
gen_goto_tb(&ctx, 0, ctx.pc);
}
- break;
- default:
- /* Both cannot be set at the same time */
- assert(0);
- }
if (env->singlestep_enabled) {
gen_op_debug();
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