From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1GxCbI-00070x-H8 for qemu-devel@nongnu.org; Wed, 20 Dec 2006 20:20:00 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1GxCbH-00070l-S4 for qemu-devel@nongnu.org; Wed, 20 Dec 2006 20:20:00 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1GxCbH-00070i-Ku for qemu-devel@nongnu.org; Wed, 20 Dec 2006 20:19:59 -0500 Received: from [199.232.41.3] (helo=savannah.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA:32) (Exim 4.52) id 1GxCbH-00013f-Ez for qemu-devel@nongnu.org; Wed, 20 Dec 2006 20:19:59 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69] helo=savannah.gnu.org) by savannah.gnu.org with esmtp (Exim 4.50) id 1GxCbF-0000Xs-4r for qemu-devel@nongnu.org; Thu, 21 Dec 2006 01:19:57 +0000 Received: from ths by savannah.gnu.org with local (Exim 4.50) id 1GxCbE-0000Xp-GU for qemu-devel@nongnu.org; Thu, 21 Dec 2006 01:19:56 +0000 Message-Id: From: Thiemo Seufer Date: Thu, 21 Dec 2006 01:19:56 +0000 Subject: [Qemu-devel] qemu hw/mips_r4k.c target-mips/cpu.h target-mip... Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org CVSROOT: /sources/qemu Module name: qemu Changes by: Thiemo Seufer 06/12/21 01:19:56 Modified files: hw : mips_r4k.c target-mips : cpu.h exec.h fop_template.c helper.c mips-defs.h op.c op_helper.c op_helper_mem.c op_mem.c op_template.c translate.c Log message: Preliminiary MIPS64 support, disabled by default due to performance impact. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/hw/mips_r4k.c?cvsroot=qemu&r1=1.24&r2=1.25 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/cpu.h?cvsroot=qemu&r1=1.13&r2=1.14 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/exec.h?cvsroot=qemu&r1=1.12&r2=1.13 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/fop_template.c?cvsroot=qemu&r1=1.1&r2=1.2 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/helper.c?cvsroot=qemu&r1=1.19&r2=1.20 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/mips-defs.h?cvsroot=qemu&r1=1.5&r2=1.6 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.16&r2=1.17 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper.c?cvsroot=qemu&r1=1.20&r2=1.21 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper_mem.c?cvsroot=qemu&r1=1.3&r2=1.4 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_mem.c?cvsroot=qemu&r1=1.4&r2=1.5 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_template.c?cvsroot=qemu&r1=1.1&r2=1.2 http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.28&r2=1.29