* [Qemu-devel] qemu/target-ppc helper.c op.c op_helper.c op_he...
@ 2007-09-19 5:44 Jocelyn Mayer
2007-09-19 16:35 ` [Qemu-devel] " Hollis Blanchard
0 siblings, 1 reply; 4+ messages in thread
From: Jocelyn Mayer @ 2007-09-19 5:44 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Jocelyn Mayer <j_mayer> 07/09/19 05:44:04
Modified files:
target-ppc : helper.c op.c op_helper.c op_helper.h
translate.c
Log message:
Code provision for PowerPC BookE MMU model support.
Better MSR flags initialisation.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.53&r2=1.54
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op.c?cvsroot=qemu&r1=1.40&r2=1.41
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemu&r1=1.37&r2=1.38
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.h?cvsroot=qemu&r1=1.11&r2=1.12
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate.c?cvsroot=qemu&r1=1.64&r2=1.65
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Qemu-devel] Re: qemu/target-ppc helper.c op.c op_helper.c op_he...
2007-09-19 5:44 [Qemu-devel] qemu/target-ppc helper.c op.c op_helper.c op_he Jocelyn Mayer
@ 2007-09-19 16:35 ` Hollis Blanchard
2007-09-19 18:40 ` J. Mayer
0 siblings, 1 reply; 4+ messages in thread
From: Hollis Blanchard @ 2007-09-19 16:35 UTC (permalink / raw)
To: qemu-devel
On Wed, 19 Sep 2007 05:44:04 +0000, Jocelyn Mayer wrote:
> CVSROOT: /sources/qemu
> Module name: qemu
> Changes by: Jocelyn Mayer <j_mayer> 07/09/19 05:44:04
>
> Modified files:
> target-ppc : helper.c op.c op_helper.c op_helper.h
> translate.c
>
> Log message:
> Code provision for PowerPC BookE MMU model support.
> Better MSR flags initialisation.
>
> CVSWeb URLs:
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.53&r2=1.54
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op.c?cvsroot=qemu&r1=1.40&r2=1.41
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemu&r1=1.37&r2=1.38
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.h?cvsroot=qemu&r1=1.11&r2=1.12
> http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate.c?cvsroot=qemu&r1=1.64&r2=1.65
tlbwe and tlbre do not use PID; they use MMUCR[STID].
Also, IBM and Freescale Book E architectures are very different here, so I
would suggest naming these functions something more specific than
e.g. "do_booke_tlbwe". You're really implementing IBM's 440
architecture here.
--
Hollis Blanchard
IBM Linux Technology Center
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] Re: qemu/target-ppc helper.c op.c op_helper.c op_he...
2007-09-19 16:35 ` [Qemu-devel] " Hollis Blanchard
@ 2007-09-19 18:40 ` J. Mayer
0 siblings, 0 replies; 4+ messages in thread
From: J. Mayer @ 2007-09-19 18:40 UTC (permalink / raw)
To: qemu-devel; +Cc: Hollis Blanchard
On Wed, 2007-09-19 at 16:35 +0000, Hollis Blanchard wrote:
> On Wed, 19 Sep 2007 05:44:04 +0000, Jocelyn Mayer wrote:
>
> > CVSROOT: /sources/qemu
> > Module name: qemu
> > Changes by: Jocelyn Mayer <j_mayer> 07/09/19 05:44:04
> >
> > Modified files:
> > target-ppc : helper.c op.c op_helper.c op_helper.h
> > translate.c
> >
> > Log message:
> > Code provision for PowerPC BookE MMU model support.
> > Better MSR flags initialisation.
> >
> > CVSWeb URLs:
> > http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.53&r2=1.54
> > http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op.c?cvsroot=qemu&r1=1.40&r2=1.41
> > http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemu&r1=1.37&r2=1.38
> > http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.h?cvsroot=qemu&r1=1.11&r2=1.12
> > http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate.c?cvsroot=qemu&r1=1.64&r2=1.65
>
> tlbwe and tlbre do not use PID; they use MMUCR[STID].
>
> Also, IBM and Freescale Book E architectures are very different here, so I
> would suggest naming these functions something more specific than
> e.g. "do_booke_tlbwe". You're really implementing IBM's 440
> architecture here.
Yes, you're right, this is incorrect for most (or all) cases. I did not
notice what the Power specification says that tlbre and tlbwe are
implementation dependent. I just compared IBM 440 and Freescale e500 TLB
models and, you're absolutelly right, they actually use different
implementation specific registers.
Thanks for reporting this !
I will start adding big warnings in my code until I can recode it in a
better way ;-)
--
J. Mayer <l_indien@magic.fr>
Never organized
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Qemu-devel] qemu/target-ppc helper.c op.c op_helper.c op_he...
@ 2007-10-01 5:16 Jocelyn Mayer
0 siblings, 0 replies; 4+ messages in thread
From: Jocelyn Mayer @ 2007-10-01 5:16 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Jocelyn Mayer <j_mayer> 07/10/01 05:16:57
Modified files:
target-ppc : helper.c op.c op_helper.c op_helper.h
translate.c
Log message:
Handle all MMU models in switches, even if it's just to abort because of lack
of supporting code.
Implement 74xx software TLB model.
Keep 74xx with software TLB disabled, as Linux is not able to handle TLB miss
on those processors.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.62&r2=1.63
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op.c?cvsroot=qemu&r1=1.50&r2=1.51
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemu&r1=1.46&r2=1.47
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.h?cvsroot=qemu&r1=1.18&r2=1.19
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate.c?cvsroot=qemu&r1=1.81&r2=1.82
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2007-10-01 5:17 UTC | newest]
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2007-09-19 5:44 [Qemu-devel] qemu/target-ppc helper.c op.c op_helper.c op_he Jocelyn Mayer
2007-09-19 16:35 ` [Qemu-devel] " Hollis Blanchard
2007-09-19 18:40 ` J. Mayer
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