* [Qemu-devel] qemu/target-ppc cpu.h helper.c helper_regs.h op...
@ 2007-11-04 2:55 Jocelyn Mayer
0 siblings, 0 replies; 2+ messages in thread
From: Jocelyn Mayer @ 2007-11-04 2:55 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Jocelyn Mayer <j_mayer> 07/11/04 02:55:34
Modified files:
target-ppc : cpu.h helper.c helper_regs.h op.c op_helper.c
op_helper.h translate.c translate_init.c
Log message:
PowerPC 601 need specific callbacks for its BATs setup.
Implement PowerPC 601 HID0 register, needed for little-endian mode support.
As a consequence, we need to merge hflags coming from MSR with other ones.
Use little-endian mode from hflags instead of MSR during code translation.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.87&r2=1.88
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.87&r2=1.88
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper_regs.h?cvsroot=qemu&r1=1.2&r2=1.3
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op.c?cvsroot=qemu&r1=1.61&r2=1.62
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemu&r1=1.62&r2=1.63
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.h?cvsroot=qemu&r1=1.25&r2=1.26
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate.c?cvsroot=qemu&r1=1.101&r2=1.102
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/translate_init.c?cvsroot=qemu&r1=1.55&r2=1.56
^ permalink raw reply [flat|nested] 2+ messages in thread
* [Qemu-devel] qemu/target-ppc cpu.h helper.c helper_regs.h op...
@ 2007-11-17 21:14 Jocelyn Mayer
0 siblings, 0 replies; 2+ messages in thread
From: Jocelyn Mayer @ 2007-11-17 21:14 UTC (permalink / raw)
To: qemu-devel
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Jocelyn Mayer <j_mayer> 07/11/17 21:14:09
Modified files:
target-ppc : cpu.h helper.c helper_regs.h op_helper.c
Log message:
PowerPC hypervisor mode is not fundamentally available only for PowerPC 64.
Remove TARGET_PPC64 dependency and add code provision to be able
to define a fake 32 bits CPU with hypervisor feature support.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/cpu.h?cvsroot=qemu&r1=1.97&r2=1.98
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper.c?cvsroot=qemu&r1=1.92&r2=1.93
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/helper_regs.h?cvsroot=qemu&r1=1.4&r2=1.5
http://cvs.savannah.gnu.org/viewcvs/qemu/target-ppc/op_helper.c?cvsroot=qemu&r1=1.69&r2=1.70
^ permalink raw reply [flat|nested] 2+ messages in thread
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