From: Thiemo Seufer <ths@networkno.de>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] qemu gdbstub.c linux-user/main.c linux-user/sig...
Date: Tue, 12 Feb 2008 21:01:26 +0000 [thread overview]
Message-ID: <E1JP2Fq-00078o-OW@cvs.savannah.gnu.org> (raw)
CVSROOT: /sources/qemu
Module name: qemu
Changes by: Thiemo Seufer <ths> 08/02/12 21:01:26
Modified files:
. : gdbstub.c
linux-user : main.c signal.c syscall.c
linux-user/mips: target_signal.h
linux-user/mips64: target_signal.h
linux-user/mipsn32: target_signal.h
target-mips : cpu.h op.c op_helper.c op_template.c
translate.c
Log message:
Make MIPS MT implementation more cache friendly.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/gdbstub.c?cvsroot=qemu&r1=1.73&r2=1.74
http://cvs.savannah.gnu.org/viewcvs/qemu/linux-user/main.c?cvsroot=qemu&r1=1.160&r2=1.161
http://cvs.savannah.gnu.org/viewcvs/qemu/linux-user/signal.c?cvsroot=qemu&r1=1.55&r2=1.56
http://cvs.savannah.gnu.org/viewcvs/qemu/linux-user/syscall.c?cvsroot=qemu&r1=1.163&r2=1.164
http://cvs.savannah.gnu.org/viewcvs/qemu/linux-user/mips/target_signal.h?cvsroot=qemu&r1=1.4&r2=1.5
http://cvs.savannah.gnu.org/viewcvs/qemu/linux-user/mips64/target_signal.h?cvsroot=qemu&r1=1.2&r2=1.3
http://cvs.savannah.gnu.org/viewcvs/qemu/linux-user/mipsn32/target_signal.h?cvsroot=qemu&r1=1.1&r2=1.2
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/cpu.h?cvsroot=qemu&r1=1.56&r2=1.57
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op.c?cvsroot=qemu&r1=1.91&r2=1.92
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper.c?cvsroot=qemu&r1=1.77&r2=1.78
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_template.c?cvsroot=qemu&r1=1.11&r2=1.12
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/translate.c?cvsroot=qemu&r1=1.121&r2=1.122
next reply other threads:[~2008-02-12 21:01 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-02-12 21:01 Thiemo Seufer [this message]
2008-04-20 10:32 ` [Qemu-devel][BUG][PATCH] Change MIPS register access Stefan Weil
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