From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JjJr1-0003Fn-3i for qemu-devel@nongnu.org; Tue, 08 Apr 2008 15:51:39 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JjJr0-0003F5-Cp for qemu-devel@nongnu.org; Tue, 08 Apr 2008 15:51:38 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JjJr0-0003Ek-2y for qemu-devel@nongnu.org; Tue, 08 Apr 2008 15:51:38 -0400 Received: from savannah.gnu.org ([199.232.41.3] helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1JjJqz-0005hy-MC for qemu-devel@nongnu.org; Tue, 08 Apr 2008 15:51:37 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1JjJqz-00088o-7E for qemu-devel@nongnu.org; Tue, 08 Apr 2008 19:51:37 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1JjJqz-00088k-3T for qemu-devel@nongnu.org; Tue, 08 Apr 2008 19:51:37 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Tue, 08 Apr 2008 19:51:37 +0000 Subject: [Qemu-devel] [4181] Remove hardcoded values in x86 CPU definitions Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 4181 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4181 Author: aurel32 Date: 2008-04-08 19:51:36 +0000 (Tue, 08 Apr 2008) Log Message: ----------- Remove hardcoded values in x86 CPU definitions Modified Paths: -------------- trunk/target-i386/helper2.c Modified: trunk/target-i386/helper2.c =================================================================== --- trunk/target-i386/helper2.c 2008-04-08 19:51:29 UTC (rev 4180) +++ trunk/target-i386/helper2.c 2008-04-08 19:51:36 UTC (rev 4181) @@ -128,6 +128,13 @@ uint32_t xlevel; } x86_def_t; +#define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE) +#define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \ + CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX) +#define PENTIUM2_FEATURES (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | \ + CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \ + CPUID_PSE36 | CPUID_FXSR) +#define PENTIUM3_FEATURES (PENTIUM_FEATURES | CPUID_SSE) #define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \ CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \ CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \ @@ -172,7 +179,7 @@ .family = 4, .model = 0, .stepping = 0, - .features = 0x0000000B, + .features = I486_FEATURES, .xlevel = 0, }, { @@ -181,7 +188,7 @@ .family = 5, .model = 4, .stepping = 3, - .features = 0x008001BF, + .features = PENTIUM_FEATURES, .xlevel = 0, }, { @@ -190,7 +197,7 @@ .family = 6, .model = 5, .stepping = 2, - .features = 0x0183F9FF, + .features = PENTIUM2_FEATURES, .xlevel = 0, }, { @@ -199,7 +206,7 @@ .family = 6, .model = 7, .stepping = 3, - .features = 0x0383F9FF, + .features = PENTIUM3_FEATURES, .xlevel = 0, }, {