From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JoLao-0002KP-47 for qemu-devel@nongnu.org; Tue, 22 Apr 2008 12:43:42 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JoLan-0002Jv-Iq for qemu-devel@nongnu.org; Tue, 22 Apr 2008 12:43:41 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JoLan-0002Jm-0T for qemu-devel@nongnu.org; Tue, 22 Apr 2008 12:43:41 -0400 Received: from savannah.gnu.org ([199.232.41.3] helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1JoLam-0005Yl-Na for qemu-devel@nongnu.org; Tue, 22 Apr 2008 12:43:40 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1JoLam-0003b7-7X for qemu-devel@nongnu.org; Tue, 22 Apr 2008 16:43:40 +0000 Received: from blueswir1 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1JoLam-0003b0-3T for qemu-devel@nongnu.org; Tue, 22 Apr 2008 16:43:40 +0000 MIME-Version: 1.0 Errors-To: blueswir1 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Blue Swirl Message-Id: Date: Tue, 22 Apr 2008 16:43:40 +0000 Subject: [Qemu-devel] [4235] Move 128-bit float emulation under linux-user including the forgotten file Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 4235 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4235 Author: blueswir1 Date: 2008-04-22 16:43:39 +0000 (Tue, 22 Apr 2008) Log Message: ----------- Move 128-bit float emulation under linux-user including the forgotten file Added Paths: ----------- trunk/linux-user/sparc_quad_float.c Added: trunk/linux-user/sparc_quad_float.c =================================================================== --- trunk/linux-user/sparc_quad_float.c (rev 0) +++ trunk/linux-user/sparc_quad_float.c 2008-04-22 16:43:39 UTC (rev 4235) @@ -0,0 +1,124 @@ +#include "exec.h" +#include "host-utils.h" +#include "helper.h" + +#define F_HELPER(name, p) void helper_f##name##p(void) + +#define F_BINOP(name) \ + F_HELPER(name, q) \ + { \ + QT0 = float128_ ## name (QT0, QT1, &env->fp_status); \ + } + +F_BINOP(add); +F_BINOP(sub); +F_BINOP(mul); +F_BINOP(div); +#undef F_BINOP + +void helper_fdmulq(void) +{ + QT0 = float128_mul(float64_to_float128(DT0, &env->fp_status), + float64_to_float128(DT1, &env->fp_status), + &env->fp_status); +} + +F_HELPER(ito, q) +{ + QT0 = int32_to_float128(*((int32_t *)&FT1), &env->fp_status); +} + +void helper_fqtos(void) +{ + FT0 = float128_to_float32(QT1, &env->fp_status); +} + +void helper_fstoq(void) +{ + QT0 = float32_to_float128(FT1, &env->fp_status); +} + +void helper_fqtod(void) +{ + DT0 = float128_to_float64(QT1, &env->fp_status); +} + +void helper_fdtoq(void) +{ + QT0 = float64_to_float128(DT1, &env->fp_status); +} + +void helper_fqtoi(void) +{ + *((int32_t *)&FT0) = float128_to_int32_round_to_zero(QT1, &env->fp_status); +} + +void helper_fsqrtq(void) +{ + QT0 = float128_sqrt(QT1, &env->fp_status); +} + +#ifdef TARGET_SPARC64 +F_HELPER(neg, q) +{ + QT0 = float128_chs(QT1); +} + +F_HELPER(xto, q) +{ + QT0 = int64_to_float128(*((int64_t *)&DT1), &env->fp_status); +} + +void helper_fqtox(void) +{ + *((int64_t *)&DT0) = float128_to_int64_round_to_zero(QT1, &env->fp_status); +} + +void helper_fabsq(void) +{ + QT0 = float128_abs(QT1); +} +#endif + +#define GEN_FCMP(name, size, reg1, reg2, FS, TRAP) \ + void glue(helper_, name) (void) \ + { \ + target_ulong new_fsr; \ + \ + env->fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS); \ + switch (glue(size, _compare) (reg1, reg2, &env->fp_status)) { \ + case float_relation_unordered: \ + new_fsr = (FSR_FCC1 | FSR_FCC0) << FS; \ + if ((env->fsr & FSR_NVM) || TRAP) { \ + env->fsr |= new_fsr; \ + env->fsr |= FSR_NVC; \ + env->fsr |= FSR_FTT_IEEE_EXCP; \ + raise_exception(TT_FP_EXCP); \ + } else { \ + env->fsr |= FSR_NVA; \ + } \ + break; \ + case float_relation_less: \ + new_fsr = FSR_FCC0 << FS; \ + break; \ + case float_relation_greater: \ + new_fsr = FSR_FCC1 << FS; \ + break; \ + default: \ + new_fsr = 0; \ + break; \ + } \ + env->fsr |= new_fsr; \ + } + +GEN_FCMP(fcmpq, float128, QT0, QT1, 0, 0); +GEN_FCMP(fcmpeq, float128, QT0, QT1, 0, 1); + +#ifdef TARGET_SPARC64 +GEN_FCMP(fcmpq_fcc1, float128, QT0, QT1, 22, 0); +GEN_FCMP(fcmpq_fcc2, float128, QT0, QT1, 24, 0); +GEN_FCMP(fcmpq_fcc3, float128, QT0, QT1, 26, 0); +GEN_FCMP(fcmpeq_fcc1, float128, QT0, QT1, 22, 1); +GEN_FCMP(fcmpeq_fcc2, float128, QT0, QT1, 24, 1); +GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1); +#endif