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From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Tue, 22 Apr 2008 21:57:58 +0000
Subject: [Qemu-devel] [4242] Fix PHYS_ADDR_MASK:
 upper bits of a PTE are reserved so they are 52 bits
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Revision: 4242
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4242
Author:   aurel32
Date:     2008-04-22 21:57:57 +0000 (Tue, 22 Apr 2008)

Log Message:
-----------
Fix PHYS_ADDR_MASK: upper bits of a PTE are reserved so they are 52 bits
long. Thanks to Paul Brook for noticing that.

Modified Paths:
--------------
    trunk/target-i386/helper2.c

Modified: trunk/target-i386/helper2.c
===================================================================
--- trunk/target-i386/helper2.c	2008-04-22 20:45:30 UTC (rev 4241)
+++ trunk/target-i386/helper2.c	2008-04-22 21:57:57 UTC (rev 4242)
@@ -800,7 +800,8 @@
 
 #else
 
-#define PHYS_ADDR_MASK (~0xfff)
+/* Bits 52-62 of a PTE are reserved. Bit 63 is the NX bit. */
+#define PHYS_ADDR_MASK 0xffffffffff000L
 
 /* return value:
    -1 = cannot handle fault