From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [4330] Remember the state of level-triggered interrupts
Date: Sun, 04 May 2008 13:15:24 +0000 [thread overview]
Message-ID: <E1Jse3o-0000Oq-Ki@cvs.savannah.gnu.org> (raw)
Revision: 4330
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4330
Author: aurel32
Date: 2008-05-04 13:15:24 +0000 (Sun, 04 May 2008)
Log Message:
-----------
Remember the state of level-triggered interrupts
(Hollis Blanchard)
Modified Paths:
--------------
trunk/hw/ppc4xx_devs.c
Modified: trunk/hw/ppc4xx_devs.c
===================================================================
--- trunk/hw/ppc4xx_devs.c 2008-05-04 13:15:15 UTC (rev 4329)
+++ trunk/hw/ppc4xx_devs.c 2008-05-04 13:15:24 UTC (rev 4330)
@@ -278,6 +278,7 @@
struct ppcuic_t {
uint32_t dcr_base;
int use_vectors;
+ uint32_t level; /* Remembers the state of level-triggered interrupts. */
uint32_t uicsr; /* Status register */
uint32_t uicer; /* Enable register */
uint32_t uiccr; /* Critical register */
@@ -385,10 +386,13 @@
uic->uicsr |= mask;
} else {
/* Level sensitive interrupt */
- if (level == 1)
+ if (level == 1) {
uic->uicsr |= mask;
- else
+ uic->level |= mask;
+ } else {
uic->uicsr &= ~mask;
+ uic->level &= ~mask;
+ }
}
#ifdef DEBUG_UIC
if (loglevel & CPU_LOG_INT) {
@@ -460,6 +464,7 @@
switch (dcrn) {
case DCR_UICSR:
uic->uicsr &= ~val;
+ uic->uicsr |= uic->level;
ppcuic_trigger_irq(uic);
break;
case DCR_UICSRS:
reply other threads:[~2008-05-04 13:15 UTC|newest]
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