From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Jse3r-0007Wa-By for qemu-devel@nongnu.org; Sun, 04 May 2008 09:15:27 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Jse3q-0007W1-M0 for qemu-devel@nongnu.org; Sun, 04 May 2008 09:15:26 -0400 Received: from [199.232.76.173] (port=41517 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Jse3q-0007Vt-B0 for qemu-devel@nongnu.org; Sun, 04 May 2008 09:15:26 -0400 Received: from savannah.gnu.org ([199.232.41.3] helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Jse3q-0003kU-6b for qemu-devel@nongnu.org; Sun, 04 May 2008 09:15:26 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1Jse3p-0000P1-3j for qemu-devel@nongnu.org; Sun, 04 May 2008 13:15:25 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1Jse3o-0000Oq-Ki for qemu-devel@nongnu.org; Sun, 04 May 2008 13:15:24 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Sun, 04 May 2008 13:15:24 +0000 Subject: [Qemu-devel] [4330] Remember the state of level-triggered interrupts Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 4330 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4330 Author: aurel32 Date: 2008-05-04 13:15:24 +0000 (Sun, 04 May 2008) Log Message: ----------- Remember the state of level-triggered interrupts (Hollis Blanchard) Modified Paths: -------------- trunk/hw/ppc4xx_devs.c Modified: trunk/hw/ppc4xx_devs.c =================================================================== --- trunk/hw/ppc4xx_devs.c 2008-05-04 13:15:15 UTC (rev 4329) +++ trunk/hw/ppc4xx_devs.c 2008-05-04 13:15:24 UTC (rev 4330) @@ -278,6 +278,7 @@ struct ppcuic_t { uint32_t dcr_base; int use_vectors; + uint32_t level; /* Remembers the state of level-triggered interrupts. */ uint32_t uicsr; /* Status register */ uint32_t uicer; /* Enable register */ uint32_t uiccr; /* Critical register */ @@ -385,10 +386,13 @@ uic->uicsr |= mask; } else { /* Level sensitive interrupt */ - if (level == 1) + if (level == 1) { uic->uicsr |= mask; - else + uic->level |= mask; + } else { uic->uicsr &= ~mask; + uic->level &= ~mask; + } } #ifdef DEBUG_UIC if (loglevel & CPU_LOG_INT) { @@ -460,6 +464,7 @@ switch (dcrn) { case DCR_UICSR: uic->uicsr &= ~val; + uic->uicsr |= uic->level; ppcuic_trigger_irq(uic); break; case DCR_UICSRS: