From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JtORv-0006Mi-Jp for qemu-devel@nongnu.org; Tue, 06 May 2008 10:47:23 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JtORv-0006MF-4t for qemu-devel@nongnu.org; Tue, 06 May 2008 10:47:23 -0400 Received: from [199.232.76.173] (port=52402 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JtORu-0006M5-LP for qemu-devel@nongnu.org; Tue, 06 May 2008 10:47:22 -0400 Received: from savannah.gnu.org ([199.232.41.3] helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1JtORu-0007y9-Au for qemu-devel@nongnu.org; Tue, 06 May 2008 10:47:22 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1JtORt-0000pN-73 for qemu-devel@nongnu.org; Tue, 06 May 2008 14:47:21 +0000 Received: from balrog by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1JtORs-0000pB-HR for qemu-devel@nongnu.org; Tue, 06 May 2008 14:47:20 +0000 MIME-Version: 1.0 Errors-To: balrog Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Andrzej Zaborowski Message-Id: Date: Tue, 06 May 2008 14:47:20 +0000 Subject: [Qemu-devel] [4359] Fix signal handler compilation on __arm__. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 4359 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4359 Author: balrog Date: 2008-05-06 14:47:19 +0000 (Tue, 06 May 2008) Log Message: ----------- Fix signal handler compilation on __arm__. Modified Paths: -------------- trunk/cpu-exec.c Modified: trunk/cpu-exec.c =================================================================== --- trunk/cpu-exec.c 2008-05-06 14:45:30 UTC (rev 4358) +++ trunk/cpu-exec.c 2008-05-06 14:47:19 UTC (rev 4359) @@ -1432,7 +1432,7 @@ unsigned long pc; int is_write; - pc = uc->uc_mcontext.gregs[R15]; + pc = uc->uc_mcontext.arm_pc; /* XXX: compute is_write */ is_write = 0; return handle_cpu_signal(pc, (unsigned long)info->si_addr,