From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [4389] CRIS: Concistent use of btarget and make it possible to single-step over delayslots .
Date: Fri, 09 May 2008 08:14:06 +0000 [thread overview]
Message-ID: <E1JuNjy-0005d2-I8@cvs.savannah.gnu.org> (raw)
Revision: 4389
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4389
Author: edgar_igl
Date: 2008-05-09 08:14:05 +0000 (Fri, 09 May 2008)
Log Message:
-----------
CRIS: Concistent use of btarget and make it possible to single-step over delayslots.
Modified Paths:
--------------
trunk/target-cris/translate.c
Modified: trunk/target-cris/translate.c
===================================================================
--- trunk/target-cris/translate.c 2008-05-09 05:55:18 UTC (rev 4388)
+++ trunk/target-cris/translate.c 2008-05-09 08:14:05 UTC (rev 4389)
@@ -2509,7 +2509,7 @@
cris_cc_mask(dc, 0);
/* Store the return address in Pd. */
tcg_gen_movi_tl(cpu_T[0], imm);
- t_gen_mov_env_TN(btarget, cpu_T[0]);
+ tcg_gen_mov_tl(env_btarget, cpu_T[0]);
tcg_gen_movi_tl(cpu_T[0], dc->pc + 8 + 4);
t_gen_mov_preg_TN(dc->op2, cpu_T[0]);
cris_prepare_dyn_jmp(dc);
@@ -2522,7 +2522,7 @@
cris_cc_mask(dc, 0);
/* Store the return address in Pd. */
t_gen_mov_TN_reg(cpu_T[0], dc->op1);
- t_gen_mov_env_TN(btarget, cpu_T[0]);
+ tcg_gen_mov_tl(env_btarget, cpu_T[0]);
tcg_gen_movi_tl(cpu_T[0], dc->pc + 4 + 4);
t_gen_mov_preg_TN(dc->op2, cpu_T[0]);
cris_prepare_dyn_jmp(dc);
@@ -2557,7 +2557,7 @@
cris_cc_mask(dc, 0);
/* Stor the return address in Pd. */
tcg_gen_movi_tl(cpu_T[0], dc->pc + simm);
- t_gen_mov_env_TN(btarget, cpu_T[0]);
+ tcg_gen_mov_tl(env_btarget, cpu_T[0]);
tcg_gen_movi_tl(cpu_T[0], dc->pc + 8);
t_gen_mov_preg_TN(dc->op2, cpu_T[0]);
cris_prepare_dyn_jmp(dc);
@@ -2573,7 +2573,7 @@
cris_cc_mask(dc, 0);
/* Stor the return address in Pd. */
tcg_gen_movi_tl(cpu_T[0], dc->pc + simm);
- t_gen_mov_env_TN(btarget, cpu_T[0]);
+ tcg_gen_mov_tl(env_btarget, cpu_T[0]);
tcg_gen_movi_tl(cpu_T[0], dc->pc + 12);
t_gen_mov_preg_TN(dc->op2, cpu_T[0]);
cris_prepare_dyn_jmp(dc);
@@ -2813,10 +2813,12 @@
if (!logfile)
logfile = stderr;
- if (tb->pc & 1)
- cpu_abort(env, "unaligned pc=%x erp=%x\n",
- env->pc, env->pregs[PR_ERP]);
- pc_start = tb->pc;
+ /* Odd PC indicates that branch is rexecuting due to exception in the
+ * delayslot, like in real hw.
+ * FIXME: we need to handle the case were the branch and the insn in
+ * the delayslot do not share pages.
+ */
+ pc_start = tb->pc & ~1;
dc->env = env;
dc->tb = tb;
@@ -2905,14 +2907,16 @@
}
}
- if (env->singlestep_enabled)
+ /* If we are rexecuting a branch due to exceptions on
+ delay slots dont break. */
+ if (!(tb->pc & 1) && env->singlestep_enabled)
break;
} while (!dc->is_jmp && gen_opc_ptr < gen_opc_end
&& ((dc->pc < next_page_start) || dc->delayed_branch));
if (dc->delayed_branch == 1) {
/* Reexecute the last insn. */
- dc->pc = dc->ppc;
+ dc->pc = dc->ppc | 1;
}
if (!dc->is_jmp) {
reply other threads:[~2008-05-09 8:14 UTC|newest]
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