From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JuNut-00078c-14 for qemu-devel@nongnu.org; Fri, 09 May 2008 04:25:23 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JuNun-000758-Ey for qemu-devel@nongnu.org; Fri, 09 May 2008 04:25:17 -0400 Received: from [199.232.76.173] (port=34496 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JuNul-00074U-T2 for qemu-devel@nongnu.org; Fri, 09 May 2008 04:25:16 -0400 Received: from savannah.gnu.org ([199.232.41.3]:56554 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1JuNul-000659-I4 for qemu-devel@nongnu.org; Fri, 09 May 2008 04:25:15 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1JuNul-0003Q6-0m for qemu-devel@nongnu.org; Fri, 09 May 2008 08:25:15 +0000 Received: from edgar_igl by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1JuNuk-0003Px-L0 for qemu-devel@nongnu.org; Fri, 09 May 2008 08:25:14 +0000 MIME-Version: 1.0 Errors-To: edgar_igl Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: "Edgar E. Iglesias" Message-Id: Date: Fri, 09 May 2008 08:25:14 +0000 Subject: [Qemu-devel] [4391] Debugger single step without interrupts (Jason Wessel). Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 4391 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4391 Author: edgar_igl Date: 2008-05-09 08:25:14 +0000 (Fri, 09 May 2008) Log Message: ----------- Debugger single step without interrupts (Jason Wessel). This patch allows the qemu backend debugger to single step an instruction without running the hardware interrupts. Modified Paths: -------------- trunk/cpu-all.h trunk/cpu-exec.c trunk/gdbstub.c trunk/qemu-doc.texi Modified: trunk/cpu-all.h =================================================================== --- trunk/cpu-all.h 2008-05-09 08:23:19 UTC (rev 4390) +++ trunk/cpu-all.h 2008-05-09 08:25:14 UTC (rev 4391) @@ -762,6 +762,11 @@ int cpu_watchpoint_remove(CPUState *env, target_ulong addr); int cpu_breakpoint_insert(CPUState *env, target_ulong pc); int cpu_breakpoint_remove(CPUState *env, target_ulong pc); + +#define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */ +#define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */ +#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */ + void cpu_single_step(CPUState *env, int enabled); void cpu_reset(CPUState *s); Modified: trunk/cpu-exec.c =================================================================== --- trunk/cpu-exec.c 2008-05-09 08:23:19 UTC (rev 4390) +++ trunk/cpu-exec.c 2008-05-09 08:25:14 UTC (rev 4391) @@ -421,7 +421,7 @@ #if defined(TARGET_I386) && env->hflags & HF_GIF_MASK #endif - ) { + && !(env->singlestep_enabled & SSTEP_NOIRQ)) { if (interrupt_request & CPU_INTERRUPT_DEBUG) { env->interrupt_request &= ~CPU_INTERRUPT_DEBUG; env->exception_index = EXCP_DEBUG; Modified: trunk/gdbstub.c =================================================================== --- trunk/gdbstub.c 2008-05-09 08:23:19 UTC (rev 4390) +++ trunk/gdbstub.c 2008-05-09 08:25:14 UTC (rev 4391) @@ -73,6 +73,11 @@ #endif } GDBState; +/* By default use no IRQs and no timers while single stepping so as to + * make single stepping like an ICE HW step. + */ +static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER; + #ifdef CONFIG_USER_ONLY /* XXX: This is not thread safe. Do we care? */ static int gdbserver_fd = -1; @@ -1072,7 +1077,7 @@ env->pc = addr; #endif } - cpu_single_step(env, 1); + cpu_single_step(env, sstep_flags); gdb_continue(s); return RS_IDLE; case 'F': @@ -1179,9 +1184,34 @@ goto breakpoint_error; } break; + case 'q': + case 'Q': + /* parse any 'q' packets here */ + if (!strcmp(p,"qemu.sstepbits")) { + /* Query Breakpoint bit definitions */ + sprintf(buf,"ENABLE=%x,NOIRQ=%x,NOTIMER=%x", + SSTEP_ENABLE, + SSTEP_NOIRQ, + SSTEP_NOTIMER); + put_packet(s, buf); + break; + } else if (strncmp(p,"qemu.sstep",10) == 0) { + /* Display or change the sstep_flags */ + p += 10; + if (*p != '=') { + /* Display current setting */ + sprintf(buf,"0x%x", sstep_flags); + put_packet(s, buf); + break; + } + p++; + type = strtoul(p, (char **)&p, 16); + sstep_flags = type; + put_packet(s, "OK"); + break; + } #ifdef CONFIG_LINUX_USER - case 'q': - if (strncmp(p, "Offsets", 7) == 0) { + else if (strncmp(p, "Offsets", 7) == 0) { TaskState *ts = env->opaque; sprintf(buf, @@ -1193,10 +1223,9 @@ put_packet(s, buf); break; } +#endif /* Fall through. */ -#endif default: - // unknown_command: /* put empty packet */ buf[0] = '\0'; put_packet(s, buf); Modified: trunk/qemu-doc.texi =================================================================== --- trunk/qemu-doc.texi 2008-05-09 08:23:19 UTC (rev 4390) +++ trunk/qemu-doc.texi 2008-05-09 08:25:14 UTC (rev 4391) @@ -1948,6 +1948,36 @@ @code{x/10i $cs*16+$eip} to dump the code at the PC position. @end enumerate +Advanced debugging options: + +The default single stepping behavior is step with the IRQs and timer service routines off. It is set this way because when gdb executes a single step it expects to advance beyond the current instruction. With the IRQs and and timer service routines on, a single step might jump into the one of the interrupt or exception vectors instead of executing the current instruction. This means you may hit the same breakpoint a number of times before executing the instruction gdb wants to have executed. Because there are rare circumstances where you want to single step into an interrupt vector the behavior can be controlled from GDB. There are three commands you can query and set the single step behavior: +@enumerate @code +@item maintenance packet qqemu.sstepbits + +This will display the MASK bits used to control the single stepping IE: +@example +(gdb) maintenance packet qqemu.sstepbits +sending: "qqemu.sstepbits" +received: "ENABLE=1,NOIRQ=2,NOTIMER=4" +@end example +@item maintenance packet qqemu.sstep + +This will display the current value of the mask used when single stepping IE: +@example +(gdb) maintenance packet qqemu.sstep +sending: "qqemu.sstep" +received: "0x7" +@end example +@item maintenance packet Qqemu.sstep=HEX_VALUE + +This will change the single step mask, so if wanted to enable IRQs on the single step, but not timers, you would use: +@example +(gdb) maintenance packet Qqemu.sstep=0x5 +sending: "qemu.sstep=0x5" +received: "OK" +@end example +@end enumerate + @node pcsys_os_specific @section Target OS specific information