From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JumpZ-0006FK-B9 for qemu-devel@nongnu.org; Sat, 10 May 2008 07:01:33 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JumpY-0006F0-Ur for qemu-devel@nongnu.org; Sat, 10 May 2008 07:01:33 -0400 Received: from [199.232.76.173] (port=58496 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JumpY-0006Ex-QI for qemu-devel@nongnu.org; Sat, 10 May 2008 07:01:32 -0400 Received: from savannah.gnu.org ([199.232.41.3]:40939 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1JumpY-00043R-KL for qemu-devel@nongnu.org; Sat, 10 May 2008 07:01:32 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1JumpX-0007U3-Oa for qemu-devel@nongnu.org; Sat, 10 May 2008 11:01:31 +0000 Received: from bellard by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1JumpX-0007Tz-D1 for qemu-devel@nongnu.org; Sat, 10 May 2008 11:01:31 +0000 MIME-Version: 1.0 Errors-To: bellard Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Fabrice Bellard Message-Id: Date: Sat, 10 May 2008 11:01:31 +0000 Subject: [Qemu-devel] [4409] no need to define global registers in cpu-exec.c Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 4409 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4409 Author: bellard Date: 2008-05-10 11:01:31 +0000 (Sat, 10 May 2008) Log Message: ----------- no need to define global registers in cpu-exec.c Modified Paths: -------------- trunk/target-i386/exec.h Modified: trunk/target-i386/exec.h =================================================================== --- trunk/target-i386/exec.h 2008-05-10 10:58:20 UTC (rev 4408) +++ trunk/target-i386/exec.h 2008-05-10 11:01:31 UTC (rev 4409) @@ -32,6 +32,8 @@ /* at least 4 register variables are defined */ register struct CPUX86State *env asm(AREG0); +#ifndef CPU_NO_GLOBAL_REGS + #if TARGET_LONG_BITS > HOST_LONG_BITS /* no registers can be used */ @@ -47,49 +49,10 @@ register target_ulong T1 asm(AREG2); register target_ulong T2 asm(AREG3); -/* if more registers are available, we define some registers too */ -#ifdef AREG4 -register target_ulong EAX asm(AREG4); -#define reg_EAX -#endif - -#ifdef AREG5 -register target_ulong ESP asm(AREG5); -#define reg_ESP -#endif - -#ifdef AREG6 -register target_ulong EBP asm(AREG6); -#define reg_EBP -#endif - -#ifdef AREG7 -register target_ulong ECX asm(AREG7); -#define reg_ECX -#endif - -#ifdef AREG8 -register target_ulong EDX asm(AREG8); -#define reg_EDX -#endif - -#ifdef AREG9 -register target_ulong EBX asm(AREG9); -#define reg_EBX -#endif - -#ifdef AREG10 -register target_ulong ESI asm(AREG10); -#define reg_ESI -#endif - -#ifdef AREG11 -register target_ulong EDI asm(AREG11); -#define reg_EDI -#endif - #endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */ +#endif /* ! CPU_NO_GLOBAL_REGS */ + #define A0 T2 extern FILE *logfile;