From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JvCeV-0006cS-8k for qemu-devel@nongnu.org; Sun, 11 May 2008 10:35:51 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JvCeS-0006c3-Si for qemu-devel@nongnu.org; Sun, 11 May 2008 10:35:49 -0400 Received: from [199.232.76.173] (port=34520 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JvCeS-0006c0-Op for qemu-devel@nongnu.org; Sun, 11 May 2008 10:35:48 -0400 Received: from savannah.gnu.org ([199.232.41.3]:55001 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1JvCeS-0004Em-Rg for qemu-devel@nongnu.org; Sun, 11 May 2008 10:35:48 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1JvCeO-00087u-Fv for qemu-devel@nongnu.org; Sun, 11 May 2008 14:35:45 +0000 Received: from pbrook by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1JvCeL-00087S-VI for qemu-devel@nongnu.org; Sun, 11 May 2008 14:35:43 +0000 MIME-Version: 1.0 Errors-To: pbrook Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Paul Brook Message-Id: Date: Sun, 11 May 2008 14:35:42 +0000 Subject: [Qemu-devel] [4426] Add TCG native negation op. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 4426 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4426 Author: pbrook Date: 2008-05-11 14:35:37 +0000 (Sun, 11 May 2008) Log Message: ----------- Add TCG native negation op. Modified Paths: -------------- trunk/target-arm/translate.c trunk/target-cris/translate.c trunk/tcg/README trunk/tcg/tcg-op.h trunk/tcg/tcg-opc.h trunk/tcg/x86_64/tcg-target.c trunk/tcg/x86_64/tcg-target.h Modified: trunk/target-arm/translate.c =================================================================== --- trunk/target-arm/translate.c 2008-05-11 14:28:14 UTC (rev 4425) +++ trunk/target-arm/translate.c 2008-05-11 14:35:37 UTC (rev 4426) @@ -457,12 +457,6 @@ tcg_gen_xori_i32(t0, t1, ~0); } -/* FIXME: Implement this natively. */ -static inline void tcg_gen_neg_i64(TCGv dest, TCGv src) -{ - tcg_gen_sub_i64(dest, tcg_const_i64(0), src); -} - /* T0 &= ~T1. Clobbers T1. */ /* FIXME: Implement bic natively. */ static inline void tcg_gen_bic_i32(TCGv dest, TCGv t0, TCGv t1) @@ -8111,7 +8105,7 @@ break; case 0x9: /* neg */ if (s->condexec_mask) - gen_op_subl_T0_T1(); + tcg_gen_neg_i32(cpu_T[0], cpu_T[1]); else gen_op_subl_T0_T1_cc(); break; Modified: trunk/target-cris/translate.c =================================================================== --- trunk/target-cris/translate.c 2008-05-11 14:28:14 UTC (rev 4425) +++ trunk/target-cris/translate.c 2008-05-11 14:35:37 UTC (rev 4426) @@ -318,7 +318,7 @@ /* y = -(x >> 16) */ tcg_gen_shri_i32(y, x, 16); - tcg_gen_sub_i32(y, tcg_const_i32(0), y); + tcg_gen_neg_i32(y, y); /* m = (y >> 16) & 16 */ tcg_gen_sari_i32(m, y, 16); @@ -753,9 +753,9 @@ t_gen_add_flag(cpu_T[0], 8); /* R_FLAG. */ break; case CC_OP_SUB: - tcg_gen_sub_tl(cpu_T[1], tcg_const_tl(0), cpu_T[1]); + tcg_gen_neg_tl(cpu_T[1], cpu_T[1]); tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); - tcg_gen_sub_tl(cpu_T[1], tcg_const_tl(0), cpu_T[1]); + tcg_gen_neg_tl(cpu_T[1], cpu_T[1]); /* CRIS flag evaluation needs ~src. */ tcg_gen_xori_tl(cpu_T[1], cpu_T[1], -1); @@ -784,9 +784,7 @@ t_gen_asr(cpu_T[0], cpu_T[0], cpu_T[1]); break; case CC_OP_NEG: - /* Hopefully the TCG backend recognizes this pattern - and makes a real neg out of it. */ - tcg_gen_sub_tl(cpu_T[0], tcg_const_tl(0), cpu_T[1]); + tcg_gen_neg_tl(cpu_T[0], cpu_T[1]); /* Extended arithmetics. */ t_gen_subx_carry(cpu_T[0]); break; @@ -829,10 +827,10 @@ } break; case CC_OP_CMP: - tcg_gen_sub_tl(cpu_T[1], tcg_const_tl(0), cpu_T[1]); + tcg_gen_neg_tl(cpu_T[1], cpu_T[1]); tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); /* CRIS flag evaluation needs ~src. */ - tcg_gen_sub_tl(cpu_T[1], tcg_const_tl(0), cpu_T[1]); + tcg_gen_neg_tl(cpu_T[1], cpu_T[1]); /* CRIS flag evaluation needs ~src. */ tcg_gen_xori_tl(cpu_T[1], cpu_T[1], -1); @@ -1642,7 +1640,7 @@ /* TODO: consider a branch free approach. */ l1 = gen_new_label(); tcg_gen_brcond_tl(TCG_COND_GE, cpu_T[1], tcg_const_tl(0), l1); - tcg_gen_sub_tl(cpu_T[1], tcg_const_tl(0), cpu_T[1]); + tcg_gen_neg_tl(cpu_T[1], cpu_T[1]); gen_set_label(l1); crisv32_alu_op(dc, CC_OP_MOVE, dc->op2, 4); return 2; Modified: trunk/tcg/README =================================================================== --- trunk/tcg/README 2008-05-11 14:28:14 UTC (rev 4425) +++ trunk/tcg/README 2008-05-11 14:35:37 UTC (rev 4426) @@ -203,6 +203,10 @@ t0=t1-t2 +* neg_i32/i64 t0, t1 + +t0=-t1 (two's complement) + * mul_i32/i64 t0, t1, t2 t0=t1*t2 Modified: trunk/tcg/tcg-op.h =================================================================== --- trunk/tcg/tcg-op.h 2008-05-11 14:28:14 UTC (rev 4425) +++ trunk/tcg/tcg-op.h 2008-05-11 14:35:37 UTC (rev 4426) @@ -1208,7 +1208,25 @@ #endif +static inline void tcg_gen_neg_i32(TCGv ret, TCGv arg) +{ +#ifdef TCG_TARGET_HAS_neg_i32 + tcg_gen_op2(INDEX_op_neg_i32, ret, arg); +#else + tcg_gen_sub_i32(ret, tcg_const_i32(0), arg); +#endif +} +static inline void tcg_gen_neg_i64(TCGv ret, TCGv arg) +{ +#ifdef TCG_TARGET_HAS_neg_i64 + tcg_gen_op2(INDEX_op_neg_i64, ret, arg); +#else + tcg_gen_sub_i64(ret, tcg_const_i64(0), arg); +#endif +} + + static inline void tcg_gen_discard_i32(TCGv arg) { tcg_gen_op1(INDEX_op_discard, arg); @@ -1441,6 +1459,7 @@ #define tcg_gen_add_tl tcg_gen_add_i64 #define tcg_gen_addi_tl tcg_gen_addi_i64 #define tcg_gen_sub_tl tcg_gen_sub_i64 +#define tcg_gen_neg_tl tcg_gen_neg_i64 #define tcg_gen_subi_tl tcg_gen_subi_i64 #define tcg_gen_and_tl tcg_gen_and_i64 #define tcg_gen_andi_tl tcg_gen_andi_i64 @@ -1483,6 +1502,7 @@ #define tcg_gen_add_tl tcg_gen_add_i32 #define tcg_gen_addi_tl tcg_gen_addi_i32 #define tcg_gen_sub_tl tcg_gen_sub_i32 +#define tcg_gen_neg_tl tcg_gen_neg_i32 #define tcg_gen_subi_tl tcg_gen_subi_i32 #define tcg_gen_and_tl tcg_gen_and_i32 #define tcg_gen_andi_tl tcg_gen_andi_i32 Modified: trunk/tcg/tcg-opc.h =================================================================== --- trunk/tcg/tcg-opc.h 2008-05-11 14:28:14 UTC (rev 4425) +++ trunk/tcg/tcg-opc.h 2008-05-11 14:35:37 UTC (rev 4426) @@ -148,6 +148,12 @@ DEF2(bswap_i64, 1, 1, 0, 0) #endif #endif +#ifdef TCG_TARGET_HAS_neg_i32 +DEF2(neg_i32, 1, 1, 0, 0) +#endif +#ifdef TCG_TARGET_HAS_neg_i64 +DEF2(neg_i64, 1, 1, 0, 0) +#endif /* QEMU specific */ DEF2(exit_tb, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) Modified: trunk/tcg/x86_64/tcg-target.c =================================================================== --- trunk/tcg/x86_64/tcg-target.c 2008-05-11 14:28:14 UTC (rev 4425) +++ trunk/tcg/x86_64/tcg-target.c 2008-05-11 14:35:37 UTC (rev 4426) @@ -1092,6 +1092,13 @@ tcg_out_opc(s, (0xc8 + (args[0] & 7)) | P_EXT | P_REXW, 0, args[0], 0); break; + case INDEX_op_neg_i32: + tcg_out_modrm(s, 0xf7, 3, args[0]); + break; + case INDEX_op_neg_i64: + tcg_out_modrm(s, 0xf7 | P_REXW, 3, args[0]); + break; + case INDEX_op_qemu_ld8u: tcg_out_qemu_ld(s, args, 0); break; @@ -1247,6 +1254,9 @@ { INDEX_op_bswap_i32, { "r", "0" } }, { INDEX_op_bswap_i64, { "r", "0" } }, + { INDEX_op_neg_i32, { "r", "0" } }, + { INDEX_op_neg_i64, { "r", "0" } }, + { INDEX_op_qemu_ld8u, { "r", "L" } }, { INDEX_op_qemu_ld8s, { "r", "L" } }, { INDEX_op_qemu_ld16u, { "r", "L" } }, Modified: trunk/tcg/x86_64/tcg-target.h =================================================================== --- trunk/tcg/x86_64/tcg-target.h 2008-05-11 14:28:14 UTC (rev 4425) +++ trunk/tcg/x86_64/tcg-target.h 2008-05-11 14:35:37 UTC (rev 4426) @@ -57,6 +57,8 @@ /* optional instructions */ #define TCG_TARGET_HAS_bswap_i32 #define TCG_TARGET_HAS_bswap_i64 +#define TCG_TARGET_HAS_neg_i32 +#define TCG_TARGET_HAS_neg_i64 /* Note: must be synced with dyngen-exec.h */ #define TCG_AREG0 TCG_REG_R14