From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JvefN-0002Q6-Un for qemu-devel@nongnu.org; Mon, 12 May 2008 16:30:38 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JvefL-0002Pu-Gp for qemu-devel@nongnu.org; Mon, 12 May 2008 16:30:36 -0400 Received: from [199.232.76.173] (port=33563 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JvefL-0002Pr-Au for qemu-devel@nongnu.org; Mon, 12 May 2008 16:30:35 -0400 Received: from savannah.gnu.org ([199.232.41.3]:42644 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1JvefL-00038v-C4 for qemu-devel@nongnu.org; Mon, 12 May 2008 16:30:35 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1JvefI-0001hg-Mt for qemu-devel@nongnu.org; Mon, 12 May 2008 20:30:33 +0000 Received: from bellard by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1JvefH-0001hc-4X for qemu-devel@nongnu.org; Mon, 12 May 2008 20:30:31 +0000 MIME-Version: 1.0 Errors-To: bellard Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Fabrice Bellard Message-Id: Date: Mon, 12 May 2008 20:30:31 +0000 Subject: [Qemu-devel] [4445] FPU fixes Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 4445 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4445 Author: bellard Date: 2008-05-12 20:30:28 +0000 (Mon, 12 May 2008) Log Message: ----------- FPU fixes Modified Paths: -------------- trunk/target-i386/translate.c Modified: trunk/target-i386/translate.c =================================================================== --- trunk/target-i386/translate.c 2008-05-12 19:10:44 UTC (rev 4444) +++ trunk/target-i386/translate.c 2008-05-12 20:30:28 UTC (rev 4445) @@ -4535,12 +4535,12 @@ switch(op >> 4) { case 0: - gen_op_ld_T0_A0(OT_LONG); + gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]); tcg_gen_helper_0_1(helper_flds_FT0, cpu_tmp2); break; case 1: - gen_op_ld_T0_A0(OT_LONG); + gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]); tcg_gen_helper_0_1(helper_fildl_FT0, cpu_tmp2); break; @@ -4551,7 +4551,7 @@ break; case 3: default: - gen_op_ld_T0_A0(OT_WORD); + gen_op_lds_T0_A0(OT_WORD + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]); tcg_gen_helper_0_1(helper_fildl_FT0, cpu_tmp2); break; @@ -4574,12 +4574,12 @@ case 0: switch(op >> 4) { case 0: - gen_op_ld_T0_A0(OT_LONG); + gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]); tcg_gen_helper_0_1(helper_flds_ST0, cpu_tmp2); break; case 1: - gen_op_ld_T0_A0(OT_LONG); + gen_op_ld_T0_A0(OT_LONG + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]); tcg_gen_helper_0_1(helper_fildl_ST0, cpu_tmp2); break; @@ -4590,7 +4590,7 @@ break; case 3: default: - gen_op_ld_T0_A0(OT_WORD); + gen_op_lds_T0_A0(OT_WORD + s->mem_index); tcg_gen_trunc_tl_i32(cpu_tmp2, cpu_T[0]); tcg_gen_helper_0_1(helper_fildl_ST0, cpu_tmp2); break; @@ -4602,7 +4602,7 @@ case 1: tcg_gen_helper_1_0(helper_fisttl_ST0, cpu_tmp2); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2); - gen_op_st_T0_A0(OT_LONG); + gen_op_st_T0_A0(OT_LONG + s->mem_index); break; case 2: tcg_gen_helper_1_0(helper_fisttll_ST0, cpu_tmp1); @@ -4613,7 +4613,7 @@ default: tcg_gen_helper_1_0(helper_fistt_ST0, cpu_tmp2); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2); - gen_op_st_T0_A0(OT_WORD); + gen_op_st_T0_A0(OT_WORD + s->mem_index); break; } tcg_gen_helper_0_0(helper_fpop); @@ -4623,12 +4623,12 @@ case 0: tcg_gen_helper_1_0(helper_fsts_ST0, cpu_tmp2); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2); - gen_op_st_T0_A0(OT_LONG); + gen_op_st_T0_A0(OT_LONG + s->mem_index); break; case 1: tcg_gen_helper_1_0(helper_fistl_ST0, cpu_tmp2); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2); - gen_op_st_T0_A0(OT_LONG); + gen_op_st_T0_A0(OT_LONG + s->mem_index); break; case 2: tcg_gen_helper_1_0(helper_fstl_ST0, cpu_tmp1); @@ -4639,7 +4639,7 @@ default: tcg_gen_helper_1_0(helper_fist_ST0, cpu_tmp2); tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2); - gen_op_st_T0_A0(OT_WORD); + gen_op_st_T0_A0(OT_WORD + s->mem_index); break; } if ((op & 7) == 3)