From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JzcMI-0005Sn-OO for qemu-devel@nongnu.org; Fri, 23 May 2008 14:51:18 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JzcMI-0005S8-1P for qemu-devel@nongnu.org; Fri, 23 May 2008 14:51:18 -0400 Received: from [199.232.76.173] (port=58317 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JzcMH-0005S1-Si for qemu-devel@nongnu.org; Fri, 23 May 2008 14:51:17 -0400 Received: from savannah.gnu.org ([199.232.41.3]:33473 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1JzcMH-00049R-Gh for qemu-devel@nongnu.org; Fri, 23 May 2008 14:51:17 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1JzcMG-0005ZE-Fx for qemu-devel@nongnu.org; Fri, 23 May 2008 18:51:16 +0000 Received: from balrog by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1JzcMF-0005Z8-TO for qemu-devel@nongnu.org; Fri, 23 May 2008 18:51:16 +0000 MIME-Version: 1.0 Errors-To: balrog Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Andrzej Zaborowski Message-Id: Date: Fri, 23 May 2008 18:51:15 +0000 Subject: [Qemu-devel] [4548] Comment non-obvious calculation. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 4548 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4548 Author: balrog Date: 2008-05-23 18:51:15 +0000 (Fri, 23 May 2008) Log Message: ----------- Comment non-obvious calculation. Don't clobber r3 in qemu_st64. Modified Paths: -------------- trunk/tcg/arm/tcg-target.c Modified: trunk/tcg/arm/tcg-target.c =================================================================== --- trunk/tcg/arm/tcg-target.c 2008-05-23 18:50:44 UTC (rev 4547) +++ trunk/tcg/arm/tcg-target.c 2008-05-23 18:51:15 UTC (rev 4548) @@ -854,12 +854,27 @@ s_bits = opc & 3; # ifdef USE_TLB + /* Should generate something like the following: + * ror r8, addr_reg, #TARGET_PAGE_BITS + * and r0, r8, #(CPU_TLB_SIZE - 1) @ Assumption: CPU_TLB_BITS <= 8 + * add r0, T0, r0 lsl #CPU_TLB_ENTRY_BITS + */ +# if CPU_TLB_BITS > 8 +# error +# endif tcg_out_dat_reg(s, COND_AL, ARITH_MOV, 8, 0, addr_reg, SHIFT_IMM_ROR(TARGET_PAGE_BITS)); tcg_out_dat_imm(s, COND_AL, ARITH_AND, 0, 8, CPU_TLB_SIZE - 1); tcg_out_dat_reg(s, COND_AL, ARITH_ADD, 0, TCG_AREG0, 0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS)); + /* In the + * ldr r1 [r0, #(offsetof(CPUState, tlb_table[mem_index][0].addr_read))] + * below, the offset is likely to exceed 12 bits if mem_index != 0 and + * not exceed otherwise, so use an + * add r0, r0, #(mem_index * sizeof *CPUState.tlb_table) + * before. + */ # define TLB_SHIFT (CPU_TLB_ENTRY_BITS + CPU_TLB_BITS) if (mem_index) tcg_out_dat_imm(s, COND_AL, ARITH_ADD, 0, 0, @@ -1025,12 +1040,24 @@ s_bits = opc & 3; # ifdef USE_TLB + /* Should generate something like the following: + * ror r8, addr_reg, #TARGET_PAGE_BITS + * and r0, r8, #(CPU_TLB_SIZE - 1) @ Assumption: CPU_TLB_BITS <= 8 + * add r0, T0, r0 lsl #CPU_TLB_ENTRY_BITS + */ tcg_out_dat_reg(s, COND_AL, ARITH_MOV, 8, 0, addr_reg, SHIFT_IMM_ROR(TARGET_PAGE_BITS)); tcg_out_dat_imm(s, COND_AL, ARITH_AND, 0, 8, CPU_TLB_SIZE - 1); tcg_out_dat_reg(s, COND_AL, ARITH_ADD, 0, TCG_AREG0, 0, SHIFT_IMM_LSL(CPU_TLB_ENTRY_BITS)); + /* In the + * ldr r1 [r0, #(offsetof(CPUState, tlb_table[mem_index][0].addr_write))] + * below, the offset is likely to exceed 12 bits if mem_index != 0 and + * not exceed otherwise, so use an + * add r0, r0, #(mem_index * sizeof *CPUState.tlb_table) + * before. + */ if (mem_index) tcg_out_dat_imm(s, COND_AL, ARITH_ADD, 0, 0, (mem_index << (TLB_SHIFT & 1)) | @@ -1084,10 +1111,6 @@ tcg_out_b(s, COND_EQ, 8); # endif -# ifdef SAVE_LR - tcg_out_dat_reg(s, cond, ARITH_MOV, 8, 0, 14, SHIFT_IMM_LSL(0)); -# endif - /* TODO: move this code to where the constants pool will be */ if (addr_reg) tcg_out_dat_reg(s, cond, ARITH_MOV, @@ -1144,8 +1167,8 @@ tcg_out_dat_imm(s, cond, ARITH_MOV, 3, 0, mem_index); break; case 3: - tcg_out_dat_imm(s, cond, ARITH_MOV, 3, 0, mem_index); - tcg_out32(s, (cond << 28) | 0x052d3010); /* str r3, [sp, #-0x10]! */ + tcg_out_dat_imm(s, cond, ARITH_MOV, 8, 0, mem_index); + tcg_out32(s, (cond << 28) | 0x052d8010); /* str r8, [sp, #-0x10]! */ if (data_reg != 2) tcg_out_dat_reg(s, cond, ARITH_MOV, 2, 0, data_reg, SHIFT_IMM_LSL(0)); @@ -1156,6 +1179,10 @@ } # endif +# ifdef SAVE_LR + tcg_out_dat_reg(s, cond, ARITH_MOV, 8, 0, 14, SHIFT_IMM_LSL(0)); +# endif + tcg_out_bl(s, cond, (tcg_target_long) qemu_st_helpers[s_bits] - (tcg_target_long) s->code_ptr);