[Qemu-devel] [4567] Relax a constraint for qemu_ld64 on ARM host.

[Qemu-devel] [4567] Relax a constraint for qemu_ld64 on ARM host.

[Andrzej Zaborowski]

Revision: 4567
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4567
Author:   balrog
Date:     2008-05-24 23:12:19 +0000 (Sat, 24 May 2008)

Log Message:
-----------
Relax a constraint for qemu_ld64 on ARM host.

Modified Paths:
--------------
    trunk/tcg/arm/tcg-target.c

Modified: trunk/tcg/arm/tcg-target.c
===================================================================
--- trunk/tcg/arm/tcg-target.c	2008-05-24 22:56:51 UTC (rev 4566)
+++ trunk/tcg/arm/tcg-target.c	2008-05-24 23:12:19 UTC (rev 4567)
@@ -109,7 +109,7 @@
         break;
 
 #ifdef CONFIG_SOFTMMU
-    /* qemu_ld/st inputs (unless 'X' or 'D') */
+    /* qemu_ld/st inputs (unless 'X', 'd' or 'D') */
     case 'x':
         ct->ct |= TCG_CT_REG;
         tcg_regset_set32(ct->u.regs, 0, (1 << TCG_TARGET_NB_REGS) - 1);
@@ -117,6 +117,14 @@
         tcg_regset_reset_reg(ct->u.regs, TCG_REG_R1);
         break;
 
+    /* qemu_ld64 data_reg */
+    case 'd':
+        ct->ct |= TCG_CT_REG;
+        tcg_regset_set32(ct->u.regs, 0, (1 << TCG_TARGET_NB_REGS) - 1);
+        /* r1 is still needed to load data_reg2, so don't use it.  */
+        tcg_regset_reset_reg(ct->u.regs, TCG_REG_R1);
+        break;
+
     /* qemu_ld/st64 data_reg2 */
     case 'D':
         ct->ct |= TCG_CT_REG;
@@ -963,8 +971,9 @@
                             data_reg, 0, 0, SHIFT_IMM_LSL(0));
         break;
     case 3:
-        tcg_out_dat_reg(s, cond, ARITH_MOV,
-                        data_reg, 0, 0, SHIFT_IMM_LSL(0));
+        if (data_reg != 0)
+            tcg_out_dat_reg(s, cond, ARITH_MOV,
+                            data_reg, 0, 0, SHIFT_IMM_LSL(0));
         if (data_reg2 != 1)
             tcg_out_dat_reg(s, cond, ARITH_MOV,
                             data_reg2, 0, 1, SHIFT_IMM_LSL(0));
@@ -1497,7 +1506,7 @@
     { INDEX_op_qemu_ld16u, { "r", "x", "X" } },
     { INDEX_op_qemu_ld16s, { "r", "x", "X" } },
     { INDEX_op_qemu_ld32u, { "r", "x", "X" } },
-    { INDEX_op_qemu_ld64, { "x", "r", "x", "X" } },
+    { INDEX_op_qemu_ld64, { "d", "r", "x", "X" } },
 
     { INDEX_op_qemu_st8, { "x", "x", "X" } },
     { INDEX_op_qemu_st16, { "x", "x", "X" } },