From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1K1PE7-0008JI-JD for qemu-devel@nongnu.org; Wed, 28 May 2008 13:14:15 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1K1PE6-0008J6-3X for qemu-devel@nongnu.org; Wed, 28 May 2008 13:14:14 -0400 Received: from [199.232.76.173] (port=35330 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1K1PE5-0008J3-UY for qemu-devel@nongnu.org; Wed, 28 May 2008 13:14:13 -0400 Received: from savannah.gnu.org ([199.232.41.3]:51044 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1K1PE5-0007Hd-Rf for qemu-devel@nongnu.org; Wed, 28 May 2008 13:14:14 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1K1PE3-0003N0-SM for qemu-devel@nongnu.org; Wed, 28 May 2008 17:14:12 +0000 Received: from bellard by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1K1PE3-0003Mo-5Y for qemu-devel@nongnu.org; Wed, 28 May 2008 17:14:11 +0000 MIME-Version: 1.0 Errors-To: bellard Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Fabrice Bellard Message-Id: Date: Wed, 28 May 2008 17:14:11 +0000 Subject: [Qemu-devel] [4609] moved halted field to CPU_COMMON Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 4609 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4609 Author: bellard Date: 2008-05-28 17:14:10 +0000 (Wed, 28 May 2008) Log Message: ----------- moved halted field to CPU_COMMON Modified Paths: -------------- trunk/cpu-defs.h trunk/hw/apic.c trunk/hw/pc.c trunk/monitor.c trunk/target-alpha/cpu.h trunk/target-arm/cpu.h trunk/target-cris/cpu.h trunk/target-i386/cpu.h trunk/target-i386/exec.h trunk/target-i386/helper.c trunk/target-i386/op_helper.c trunk/target-m68k/cpu.h trunk/target-mips/cpu.h trunk/target-ppc/cpu.h trunk/target-sh4/cpu.h trunk/target-sparc/cpu.h Modified: trunk/cpu-defs.h =================================================================== --- trunk/cpu-defs.h 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/cpu-defs.h 2008-05-28 17:14:10 UTC (rev 4609) @@ -140,6 +140,7 @@ written */ \ target_ulong mem_write_vaddr; /* target virtual addr at which the \ memory was written */ \ + int halted; /* TRUE if the CPU is in suspend state */ \ /* The meaning of the MMU modes is defined in the target code. */ \ CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \ struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \ Modified: trunk/hw/apic.c =================================================================== --- trunk/hw/apic.c 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/hw/apic.c 2008-05-28 17:14:10 UTC (rev 4609) @@ -443,12 +443,12 @@ static void apic_startup(APICState *s, int vector_num) { CPUState *env = s->cpu_env; - if (!(env->hflags & HF_HALTED_MASK)) + if (!env->halted) return; env->eip = 0; cpu_x86_load_seg_cache(env, R_CS, vector_num << 8, vector_num << 12, 0xffff, 0); - env->hflags &= ~HF_HALTED_MASK; + env->halted = 0; } static void apic_deliver(APICState *s, uint8_t dest, uint8_t dest_mode, Modified: trunk/hw/pc.c =================================================================== --- trunk/hw/pc.c 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/hw/pc.c 2008-05-28 17:14:10 UTC (rev 4609) @@ -761,7 +761,7 @@ exit(1); } if (i != 0) - env->hflags |= HF_HALTED_MASK; + env->halted = 1; if (smp_cpus > 1) { /* XXX: enable it in all cases */ env->cpuid_features |= CPUID_APIC; Modified: trunk/monitor.c =================================================================== --- trunk/monitor.c 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/monitor.c 2008-05-28 17:14:10 UTC (rev 4609) @@ -314,21 +314,15 @@ env->cpu_index); #if defined(TARGET_I386) term_printf(" pc=0x" TARGET_FMT_lx, env->eip + env->segs[R_CS].base); - if (env->hflags & HF_HALTED_MASK) - term_printf(" (halted)"); #elif defined(TARGET_PPC) term_printf(" nip=0x" TARGET_FMT_lx, env->nip); - if (env->halted) - term_printf(" (halted)"); #elif defined(TARGET_SPARC) term_printf(" pc=0x" TARGET_FMT_lx " npc=0x" TARGET_FMT_lx, env->pc, env->npc); - if (env->halted) - term_printf(" (halted)"); #elif defined(TARGET_MIPS) term_printf(" PC=0x" TARGET_FMT_lx, env->PC[env->current_tc]); +#endif if (env->halted) term_printf(" (halted)"); -#endif term_printf("\n"); } } Modified: trunk/target-alpha/cpu.h =================================================================== --- trunk/target-alpha/cpu.h 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/target-alpha/cpu.h 2008-05-28 17:14:10 UTC (rev 4609) @@ -285,7 +285,6 @@ jmp_buf jmp_env; int user_mode_only; /* user mode only simulation */ uint32_t hflags; - int halted; int exception_index; int error_code; Modified: trunk/target-arm/cpu.h =================================================================== --- trunk/target-arm/cpu.h 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/target-arm/cpu.h 2008-05-28 17:14:10 UTC (rev 4609) @@ -160,7 +160,6 @@ int exception_index; int interrupt_request; int user_mode_only; - int halted; /* VFP coprocessor state. */ struct { Modified: trunk/target-cris/cpu.h =================================================================== --- trunk/target-cris/cpu.h 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/target-cris/cpu.h 2008-05-28 17:14:10 UTC (rev 4609) @@ -157,7 +157,6 @@ int features; int user_mode_only; - int halted; jmp_buf jmp_env; CPU_COMMON Modified: trunk/target-i386/cpu.h =================================================================== --- trunk/target-i386/cpu.h 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/target-i386/cpu.h 2008-05-28 17:14:10 UTC (rev 4609) @@ -119,7 +119,7 @@ #define ID_MASK 0x00200000 /* hidden flags - used internally by qemu to represent additional cpu - states. Only the CPL, INHIBIT_IRQ and HALTED are not redundant. We avoid + states. Only the CPL and INHIBIT_IRQ are not redundant. We avoid using the IOPL_MASK, TF_MASK and VM_MASK bit position to ease oring with eflags. */ /* current cpl */ @@ -144,7 +144,6 @@ #define HF_CS64_SHIFT 15 /* only used on x86_64: 64 bit code segment */ #define HF_OSFXSR_SHIFT 16 /* CR4.OSFXSR */ #define HF_VM_SHIFT 17 /* must be same as eflags */ -#define HF_HALTED_SHIFT 18 /* CPU halted */ #define HF_SMM_SHIFT 19 /* CPU in SMM mode */ #define HF_GIF_SHIFT 20 /* if set CPU takes interrupts */ #define HF_HIF_SHIFT 21 /* shadow copy of IF_MASK when in SVM */ @@ -166,7 +165,6 @@ #define HF_LMA_MASK (1 << HF_LMA_SHIFT) #define HF_CS64_MASK (1 << HF_CS64_SHIFT) #define HF_OSFXSR_MASK (1 << HF_OSFXSR_SHIFT) -#define HF_HALTED_MASK (1 << HF_HALTED_SHIFT) #define HF_SMM_MASK (1 << HF_SMM_SHIFT) #define HF_GIF_MASK (1 << HF_GIF_SHIFT) #define HF_HIF_MASK (1 << HF_HIF_SHIFT) Modified: trunk/target-i386/exec.h =================================================================== --- trunk/target-i386/exec.h 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/target-i386/exec.h 2008-05-28 17:14:10 UTC (rev 4609) @@ -385,13 +385,13 @@ static inline int cpu_halted(CPUState *env) { /* handle exit of HALTED state */ - if (!(env->hflags & HF_HALTED_MASK)) + if (!env->halted) return 0; /* disable halt condition */ if (((env->interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) || (env->interrupt_request & CPU_INTERRUPT_NMI)) { - env->hflags &= ~HF_HALTED_MASK; + env->halted = 0; return 0; } return EXCP_HALTED; Modified: trunk/target-i386/helper.c =================================================================== --- trunk/target-i386/helper.c 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/target-i386/helper.c 2008-05-28 17:14:10 UTC (rev 4609) @@ -515,7 +515,7 @@ (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, (int)(env->a20_mask >> 20) & 1, (env->hflags >> HF_SMM_SHIFT) & 1, - (env->hflags >> HF_HALTED_SHIFT) & 1); + env->halted); } else #endif { @@ -542,7 +542,7 @@ (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, (int)(env->a20_mask >> 20) & 1, (env->hflags >> HF_SMM_SHIFT) & 1, - (env->hflags >> HF_HALTED_SHIFT) & 1); + env->halted); } #ifdef TARGET_X86_64 Modified: trunk/target-i386/op_helper.c =================================================================== --- trunk/target-i386/op_helper.c 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/target-i386/op_helper.c 2008-05-28 17:14:10 UTC (rev 4609) @@ -4546,7 +4546,7 @@ helper_svm_check_intercept_param(SVM_EXIT_HLT, 0); env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */ - env->hflags |= HF_HALTED_MASK; + env->halted = 1; env->exception_index = EXCP_HLT; cpu_loop_exit(); } Modified: trunk/target-m68k/cpu.h =================================================================== --- trunk/target-m68k/cpu.h 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/target-m68k/cpu.h 2008-05-28 17:14:10 UTC (rev 4609) @@ -108,7 +108,6 @@ int exception_index; int interrupt_request; int user_mode_only; - uint32_t halted; int pending_vector; int pending_level; Modified: trunk/target-mips/cpu.h =================================================================== --- trunk/target-mips/cpu.h 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/target-mips/cpu.h 2008-05-28 17:14:10 UTC (rev 4609) @@ -449,8 +449,6 @@ target_ulong btarget; /* Jump / branch target */ int bcond; /* Branch condition (if needed) */ - int halted; /* TRUE if the CPU is in suspend state */ - int SYNCI_Step; /* Address step size for SYNCI */ int CCRes; /* Cycle count resolution/divisor */ uint32_t CP0_Status_rw_bitmask; /* Read/write bits in CP0_Status */ Modified: trunk/target-ppc/cpu.h =================================================================== --- trunk/target-ppc/cpu.h 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/target-ppc/cpu.h 2008-05-28 17:14:10 UTC (rev 4609) @@ -586,8 +586,6 @@ CPU_COMMON - int halted; /* TRUE if the CPU is in suspend state */ - int access_type; /* when a memory exception occurs, the access type is stored here */ Modified: trunk/target-sh4/cpu.h =================================================================== --- trunk/target-sh4/cpu.h 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/target-sh4/cpu.h 2008-05-28 17:14:10 UTC (rev 4609) @@ -117,7 +117,6 @@ jmp_buf jmp_env; int user_mode_only; int interrupt_request; - int halted; int exception_index; CPU_COMMON tlb_t utlb[UTLB_SIZE]; /* unified translation table */ tlb_t itlb[ITLB_SIZE]; /* instruction translation table */ Modified: trunk/target-sparc/cpu.h =================================================================== --- trunk/target-sparc/cpu.h 2008-05-28 16:49:25 UTC (rev 4608) +++ trunk/target-sparc/cpu.h 2008-05-28 17:14:10 UTC (rev 4609) @@ -219,7 +219,6 @@ int exception_index; int interrupt_index; int interrupt_request; - int halted; uint32_t mmu_bm; uint32_t mmu_ctpr_mask; uint32_t mmu_cxr_mask;