From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1K2yQL-0004wJ-Qa for qemu-devel@nongnu.org; Sun, 01 Jun 2008 21:01:21 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1K2yQK-0004tY-UJ for qemu-devel@nongnu.org; Sun, 01 Jun 2008 21:01:20 -0400 Received: from [199.232.76.173] (port=49841 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1K2yQK-0004sx-EX for qemu-devel@nongnu.org; Sun, 01 Jun 2008 21:01:20 -0400 Received: from savannah.gnu.org ([199.232.41.3]:56316 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1K2yQK-0001hd-6p for qemu-devel@nongnu.org; Sun, 01 Jun 2008 21:01:20 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1K2yQJ-0004eT-FD for qemu-devel@nongnu.org; Mon, 02 Jun 2008 01:01:19 +0000 Received: from balrog by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1K2yQJ-0004e7-23 for qemu-devel@nongnu.org; Mon, 02 Jun 2008 01:01:19 +0000 MIME-Version: 1.0 Errors-To: balrog Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Andrzej Zaborowski Message-Id: Date: Mon, 02 Jun 2008 01:01:19 +0000 Subject: [Qemu-devel] [4641] Restore ARM signal handler compilation on glibc < 2.5 (Blue Swirl). Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 4641 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4641 Author: balrog Date: 2008-06-02 01:01:18 +0000 (Mon, 02 Jun 2008) Log Message: ----------- Restore ARM signal handler compilation on glibc < 2.5 (Blue Swirl). Modified Paths: -------------- trunk/cpu-exec.c Modified: trunk/cpu-exec.c =================================================================== --- trunk/cpu-exec.c 2008-06-02 00:55:08 UTC (rev 4640) +++ trunk/cpu-exec.c 2008-06-02 01:01:18 UTC (rev 4641) @@ -1320,7 +1320,11 @@ unsigned long pc; int is_write; +#if (__GLIBC__ < 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ =< 3)) + pc = uc->uc_mcontext.gregs[R15]; +#else pc = uc->uc_mcontext.arm_pc; +#endif /* XXX: compute is_write */ is_write = 0; return handle_cpu_signal(pc, (unsigned long)info->si_addr,