From: Paul Brook <paul@nowt.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [4800] Add missing file.
Date: Sun, 29 Jun 2008 10:43:17 +0000 [thread overview]
Message-ID: <E1KCuNJ-0007bc-NK@cvs.savannah.gnu.org> (raw)
Revision: 4800
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4800
Author: pbrook
Date: 2008-06-29 10:43:16 +0000 (Sun, 29 Jun 2008)
Log Message:
-----------
Add missing file. Fix spelling errors.
Modified Paths:
--------------
trunk/qemu-doc.texi
trunk/target-mips/translate.c
trunk/vl.c
Added Paths:
-----------
trunk/gen-icount.h
Added: trunk/gen-icount.h
===================================================================
--- trunk/gen-icount.h (rev 0)
+++ trunk/gen-icount.h 2008-06-29 10:43:16 UTC (rev 4800)
@@ -0,0 +1,56 @@
+/* Helpewrs for instruction counting code genration. */
+
+static TCGArg *icount_arg;
+static int icount_label;
+
+static inline void gen_icount_start(void)
+{
+ TCGv count;
+
+ if (!use_icount)
+ return;
+
+ icount_label = gen_new_label();
+ /* FIXME: This generates lousy code. We can't use tcg_new_temp because
+ count needs to live over the conditional branch. To workaround this
+ we allow the target to supply a convenient register temporary. */
+#ifndef ICOUNT_TEMP
+ count = tcg_temp_local_new(TCG_TYPE_I32);
+#else
+ count = ICOUNT_TEMP;
+#endif
+ tcg_gen_ld_i32(count, cpu_env, offsetof(CPUState, icount_decr.u32));
+ /* This is a horrid hack to allow fixing up the value later. */
+ icount_arg = gen_opparam_ptr + 1;
+ tcg_gen_subi_i32(count, count, 0xdeadbeef);
+
+ tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, icount_label);
+ tcg_gen_st16_i32(count, cpu_env, offsetof(CPUState, icount_decr.u16.low));
+#ifndef ICOUNT_TEMP
+ tcg_temp_free(count);
+#endif
+}
+
+static void gen_icount_end(TranslationBlock *tb, int num_insns)
+{
+ if (use_icount) {
+ *icount_arg = num_insns;
+ gen_set_label(icount_label);
+ tcg_gen_exit_tb((long)tb + 2);
+ }
+}
+
+static void inline gen_io_start(void)
+{
+ TCGv tmp = tcg_const_i32(1);
+ tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUState, can_do_io));
+ tcg_temp_free(tmp);
+}
+
+static inline void gen_io_end(void)
+{
+ TCGv tmp = tcg_const_i32(0);
+ tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUState, can_do_io));
+ tcg_temp_free(tmp);
+}
+
Modified: trunk/qemu-doc.texi
===================================================================
--- trunk/qemu-doc.texi 2008-06-29 01:03:05 UTC (rev 4799)
+++ trunk/qemu-doc.texi 2008-06-29 10:43:16 UTC (rev 4800)
@@ -974,7 +974,7 @@
Note that while this option can give deterministic behavior, it does not
provide cycle accurate emulation. Modern CPUs contain superscalar out of
-order cores with complex cache heirachies. The number of instructions
+order cores with complex cache hierarchies. The number of instructions
executed often has little or no correlation with actual performance.
@end table
Modified: trunk/target-mips/translate.c
===================================================================
--- trunk/target-mips/translate.c 2008-06-29 01:03:05 UTC (rev 4799)
+++ trunk/target-mips/translate.c 2008-06-29 10:43:16 UTC (rev 4800)
@@ -7862,7 +7862,6 @@
ctx.mem_idx = ctx.hflags & MIPS_HFLAG_KSU;
#endif
num_insns = 0;
- num_insns = 0;
max_insns = tb->cflags & CF_COUNT_MASK;
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
Modified: trunk/vl.c
===================================================================
--- trunk/vl.c 2008-06-29 01:03:05 UTC (rev 4799)
+++ trunk/vl.c 2008-06-29 10:43:16 UTC (rev 4800)
@@ -7446,7 +7446,7 @@
" To see what timers are available use -clock ?\n"
"-startdate select initial date of the clock\n"
"-icount [N|auto]\n"
- " Enable virtual instruction counter with 2^N clock ticks per instructon\n"
+ " Enable virtual instruction counter with 2^N clock ticks per instruction\n"
"\n"
"During emulation, the following keys are useful:\n"
"ctrl-alt-f toggle full screen\n"
reply other threads:[~2008-06-29 10:43 UTC|newest]
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