From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KYodY-0006Ih-7Z for qemu-devel@nongnu.org; Thu, 28 Aug 2008 17:02:36 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KYodX-0006Hi-A3 for qemu-devel@nongnu.org; Thu, 28 Aug 2008 17:02:35 -0400 Received: from [199.232.76.173] (port=33776 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KYodX-0006HV-4A for qemu-devel@nongnu.org; Thu, 28 Aug 2008 17:02:35 -0400 Received: from savannah.gnu.org ([199.232.41.3]:44534 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KYodW-0006tY-0q for qemu-devel@nongnu.org; Thu, 28 Aug 2008 17:02:34 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1KYodT-0004vN-Gn for qemu-devel@nongnu.org; Thu, 28 Aug 2008 21:02:31 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1KYodT-0004vJ-9G for qemu-devel@nongnu.org; Thu, 28 Aug 2008 21:02:31 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Thu, 28 Aug 2008 21:02:31 +0000 Subject: [Qemu-devel] [5099] SH4: Convert dyngen registers moves to TCG Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 5099 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5099 Author: aurel32 Date: 2008-08-28 21:02:30 +0000 (Thu, 28 Aug 2008) Log Message: ----------- SH4: Convert dyngen registers moves to TCG Signed-off-by: Aurelien Jarno Modified Paths: -------------- trunk/target-sh4/op.c trunk/target-sh4/translate.c Modified: trunk/target-sh4/op.c =================================================================== --- trunk/target-sh4/op.c 2008-08-28 21:02:19 UTC (rev 5098) +++ trunk/target-sh4/op.c 2008-08-28 21:02:30 UTC (rev 5099) @@ -946,12 +946,6 @@ RETURN(); } -void OPPROTO op_movl_T0_T1(void) -{ - T1 = T0; - RETURN(); -} - void OPPROTO op_movl_fpul_FT0(void) { FT0 = *(float32 *)&env->fpul; Modified: trunk/target-sh4/translate.c =================================================================== --- trunk/target-sh4/translate.c 2008-08-28 21:02:19 UTC (rev 5098) +++ trunk/target-sh4/translate.c 2008-08-28 21:02:30 UTC (rev 5099) @@ -584,7 +584,7 @@ case 0x000f: /* mac.l @Rm+,@Rn+ */ gen_op_movl_rN_T0(REG(B11_8)); gen_op_ldl_T0_T0(ctx); - gen_op_movl_T0_T1(); + tcg_gen_mov_tl(cpu_T[0], cpu_T[1]); gen_op_movl_rN_T0(REG(B7_4)); gen_op_ldl_T0_T0(ctx); gen_op_macl_T0_T1(); @@ -594,7 +594,7 @@ case 0x400f: /* mac.w @Rm+,@Rn+ */ gen_op_movl_rN_T0(REG(B11_8)); gen_op_ldl_T0_T0(ctx); - gen_op_movl_T0_T1(); + tcg_gen_mov_tl(cpu_T[0], cpu_T[1]); gen_op_movl_rN_T0(REG(B7_4)); gen_op_ldl_T0_T0(ctx); gen_op_macw_T0_T1(); @@ -813,7 +813,7 @@ case 0xcd00: /* and.b #imm,@(R0,GBR) */ gen_op_movl_rN_T0(REG(0)); gen_op_addl_GBR_T0(); - gen_op_movl_T0_T1(); + tcg_gen_mov_tl(cpu_T[0], cpu_T[1]); gen_op_ldub_T0_T0(ctx); gen_op_and_imm_T0(B7_0); gen_op_stb_T0_T1(ctx); @@ -865,21 +865,21 @@ case 0xc000: /* mov.b R0,@(disp,GBR) */ gen_op_stc_gbr_T0(); gen_op_addl_imm_T0(B7_0); - gen_op_movl_T0_T1(); + tcg_gen_mov_tl(cpu_T[0], cpu_T[1]); gen_op_movl_rN_T0(REG(0)); gen_op_stb_T0_T1(ctx); return; case 0xc100: /* mov.w R0,@(disp,GBR) */ gen_op_stc_gbr_T0(); gen_op_addl_imm_T0(B7_0 * 2); - gen_op_movl_T0_T1(); + tcg_gen_mov_tl(cpu_T[0], cpu_T[1]); gen_op_movl_rN_T0(REG(0)); gen_op_stw_T0_T1(ctx); return; case 0xc200: /* mov.l R0,@(disp,GBR) */ gen_op_stc_gbr_T0(); gen_op_addl_imm_T0(B7_0 * 4); - gen_op_movl_T0_T1(); + tcg_gen_mov_tl(cpu_T[0], cpu_T[1]); gen_op_movl_rN_T0(REG(0)); gen_op_stl_T0_T1(ctx); return; @@ -917,7 +917,7 @@ case 0xcf00: /* or.b #imm,@(R0,GBR) */ gen_op_movl_rN_T0(REG(0)); gen_op_addl_GBR_T0(); - gen_op_movl_T0_T1(); + tcg_gen_mov_tl(cpu_T[0], cpu_T[1]); gen_op_ldub_T0_T0(ctx); gen_op_or_imm_T0(B7_0); gen_op_stb_T0_T1(ctx); @@ -942,7 +942,7 @@ case 0xce00: /* xor.b #imm,@(R0,GBR) */ gen_op_movl_rN_T0(REG(0)); gen_op_addl_GBR_T0(); - gen_op_movl_T0_T1(); + tcg_gen_mov_tl(cpu_T[0], cpu_T[1]); gen_op_ldub_T0_T0(ctx); gen_op_xor_imm_T0(B7_0); gen_op_stb_T0_T1(ctx); @@ -1110,7 +1110,7 @@ return; case 0x401b: /* tas.b @Rn */ gen_op_movl_rN_T0(REG(B11_8)); - gen_op_movl_T0_T1(); + tcg_gen_mov_tl(cpu_T[0], cpu_T[1]); gen_op_ldub_T0_T0(ctx); gen_op_cmp_eq_imm_T0(0); gen_op_or_imm_T0(0x80);