From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KZ6Wg-0000hp-Oo for qemu-devel@nongnu.org; Fri, 29 Aug 2008 12:08:42 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KZ6Wf-0000gy-VI for qemu-devel@nongnu.org; Fri, 29 Aug 2008 12:08:42 -0400 Received: from [199.232.76.173] (port=46276 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KZ6Wf-0000gj-R6 for qemu-devel@nongnu.org; Fri, 29 Aug 2008 12:08:41 -0400 Received: from savannah.gnu.org ([199.232.41.3]:50996 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KZ6We-0005rA-Qr for qemu-devel@nongnu.org; Fri, 29 Aug 2008 12:08:41 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1KZ6Wd-000144-SA for qemu-devel@nongnu.org; Fri, 29 Aug 2008 16:08:39 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1KZ6Wd-000140-I4 for qemu-devel@nongnu.org; Fri, 29 Aug 2008 16:08:39 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Fri, 29 Aug 2008 16:08:39 +0000 Subject: [Qemu-devel] [5106] SH4: Fix bugs introduce in r5099 Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 5106 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5106 Author: aurel32 Date: 2008-08-29 16:08:38 +0000 (Fri, 29 Aug 2008) Log Message: ----------- SH4: Fix bugs introduce in r5099 Signed-off-by: Aurelien Jarno Modified Paths: -------------- trunk/target-sh4/translate.c Modified: trunk/target-sh4/translate.c =================================================================== --- trunk/target-sh4/translate.c 2008-08-29 13:27:29 UTC (rev 5105) +++ trunk/target-sh4/translate.c 2008-08-29 16:08:38 UTC (rev 5106) @@ -624,7 +624,7 @@ case 0x000f: /* mac.l @Rm+,@Rn+ */ tcg_gen_mov_i32(cpu_T[0], cpu_gregs[REG(B11_8)]); gen_op_ldl_T0_T0(ctx); - tcg_gen_mov_i32(cpu_T[0], cpu_T[1]); + tcg_gen_mov_i32(cpu_T[1], cpu_T[0]); tcg_gen_mov_i32(cpu_T[0], cpu_gregs[REG(B7_4)]); gen_op_ldl_T0_T0(ctx); gen_op_macl_T0_T1(); @@ -634,7 +634,7 @@ case 0x400f: /* mac.w @Rm+,@Rn+ */ tcg_gen_mov_i32(cpu_T[0], cpu_gregs[REG(B11_8)]); gen_op_ldl_T0_T0(ctx); - tcg_gen_mov_i32(cpu_T[0], cpu_T[1]); + tcg_gen_mov_i32(cpu_T[1], cpu_T[0]); tcg_gen_mov_i32(cpu_T[0], cpu_gregs[REG(B7_4)]); gen_op_ldl_T0_T0(ctx); gen_op_macw_T0_T1(); @@ -851,7 +851,7 @@ case 0xcd00: /* and.b #imm,@(R0,GBR) */ tcg_gen_mov_i32(cpu_T[0], cpu_gregs[REG(0)]); gen_op_addl_GBR_T0(); - tcg_gen_mov_i32(cpu_T[0], cpu_T[1]); + tcg_gen_mov_i32(cpu_T[1], cpu_T[0]); gen_op_ldub_T0_T0(ctx); tcg_gen_andi_i32(cpu_T[0], cpu_T[0], B7_0); gen_op_stb_T0_T1(ctx); @@ -903,21 +903,21 @@ case 0xc000: /* mov.b R0,@(disp,GBR) */ gen_op_stc_gbr_T0(); tcg_gen_addi_i32(cpu_T[0], cpu_T[0], B7_0); - tcg_gen_mov_i32(cpu_T[0], cpu_T[1]); + tcg_gen_mov_i32(cpu_T[1], cpu_T[0]); tcg_gen_mov_i32(cpu_T[0], cpu_gregs[REG(0)]); gen_op_stb_T0_T1(ctx); return; case 0xc100: /* mov.w R0,@(disp,GBR) */ gen_op_stc_gbr_T0(); tcg_gen_addi_i32(cpu_T[0], cpu_T[0], B7_0 * 2); - tcg_gen_mov_i32(cpu_T[0], cpu_T[1]); + tcg_gen_mov_i32(cpu_T[1], cpu_T[0]); tcg_gen_mov_i32(cpu_T[0], cpu_gregs[REG(0)]); gen_op_stw_T0_T1(ctx); return; case 0xc200: /* mov.l R0,@(disp,GBR) */ gen_op_stc_gbr_T0(); tcg_gen_addi_i32(cpu_T[0], cpu_T[0], B7_0 * 4); - tcg_gen_mov_i32(cpu_T[0], cpu_T[1]); + tcg_gen_mov_i32(cpu_T[1], cpu_T[0]); tcg_gen_mov_i32(cpu_T[0], cpu_gregs[REG(0)]); gen_op_stl_T0_T1(ctx); return; @@ -980,7 +980,7 @@ case 0xce00: /* xor.b #imm,@(R0,GBR) */ tcg_gen_mov_i32(cpu_T[0], cpu_gregs[REG(0)]); gen_op_addl_GBR_T0(); - tcg_gen_mov_i32(cpu_T[0], cpu_T[1]); + tcg_gen_mov_i32(cpu_T[1], cpu_T[0]); gen_op_ldub_T0_T0(ctx); tcg_gen_xori_i32(cpu_T[0], cpu_T[0], B7_0); gen_op_stb_T0_T1(ctx); @@ -1154,7 +1154,7 @@ return; case 0x401b: /* tas.b @Rn */ tcg_gen_mov_i32(cpu_T[0], cpu_gregs[REG(B11_8)]); - tcg_gen_mov_i32(cpu_T[0], cpu_T[1]); + tcg_gen_mov_i32(cpu_T[1], cpu_T[0]); gen_op_ldub_T0_T0(ctx); gen_op_cmp_eq_imm_T0(0); tcg_gen_ori_i32(cpu_T[0], cpu_T[0], 0x80);