From: Blue Swirl <blauwirbel@gmail.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [5123] Fix y register loads and stores
Date: Mon, 01 Sep 2008 19:35:30 +0000 [thread overview]
Message-ID: <E1KaFBS-0003DQ-SJ@cvs.savannah.gnu.org> (raw)
Revision: 5123
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5123
Author: blueswir1
Date: 2008-09-01 19:35:29 +0000 (Mon, 01 Sep 2008)
Log Message:
-----------
Fix y register loads and stores
Modified Paths:
--------------
trunk/target-sparc/translate.c
Modified: trunk/target-sparc/translate.c
===================================================================
--- trunk/target-sparc/translate.c 2008-09-01 13:09:21 UTC (rev 5122)
+++ trunk/target-sparc/translate.c 2008-09-01 19:35:29 UTC (rev 5123)
@@ -713,36 +713,32 @@
static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2)
{
- TCGv r_temp, r_temp2;
+ TCGv r_temp;
int l1;
l1 = gen_new_label();
r_temp = tcg_temp_new(TCG_TYPE_TL);
- r_temp2 = tcg_temp_new(TCG_TYPE_I32);
/* old op:
if (!(env->y & 1))
T1 = 0;
*/
tcg_gen_mov_tl(cpu_cc_src, src1);
- tcg_gen_ld32u_tl(r_temp, cpu_env, offsetof(CPUSPARCState, y));
- tcg_gen_trunc_tl_i32(r_temp2, r_temp);
- tcg_gen_andi_i32(r_temp2, r_temp2, 0x1);
+ tcg_gen_ld_tl(r_temp, cpu_env, offsetof(CPUSPARCState, y));
+ tcg_gen_andi_tl(r_temp, r_temp, 0x1);
tcg_gen_mov_tl(cpu_cc_src2, src2);
- tcg_gen_brcondi_i32(TCG_COND_NE, r_temp2, 0, l1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, r_temp, 0, l1);
tcg_gen_movi_tl(cpu_cc_src2, 0);
gen_set_label(l1);
// b2 = T0 & 1;
// env->y = (b2 << 31) | (env->y >> 1);
- tcg_gen_trunc_tl_i32(r_temp2, cpu_cc_src);
- tcg_gen_andi_i32(r_temp2, r_temp2, 0x1);
- tcg_gen_shli_i32(r_temp2, r_temp2, 31);
- tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, y));
- tcg_gen_shri_i32(cpu_tmp32, cpu_tmp32, 1);
- tcg_gen_or_i32(cpu_tmp32, cpu_tmp32, r_temp2);
- tcg_temp_free(r_temp2);
- tcg_gen_st_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, y));
+ tcg_gen_andi_tl(r_temp, cpu_cc_src, 0x1);
+ tcg_gen_shli_tl(r_temp, r_temp, 31);
+ tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, y));
+ tcg_gen_shri_tl(cpu_tmp0, cpu_tmp0, 1);
+ tcg_gen_or_tl(cpu_tmp0, cpu_tmp0, r_temp);
+ tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, y));
// b1 = N ^ V;
gen_mov_reg_N(cpu_tmp0, cpu_psr);
@@ -778,9 +774,10 @@
tcg_gen_mul_i64(r_temp2, r_temp, r_temp2);
tcg_gen_shri_i64(r_temp, r_temp2, 32);
- tcg_gen_trunc_i64_i32(r_temp, r_temp);
- tcg_gen_st_i32(r_temp, cpu_env, offsetof(CPUSPARCState, y));
+ tcg_gen_trunc_i64_tl(cpu_tmp0, r_temp);
tcg_temp_free(r_temp);
+ tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0xffffffff);
+ tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, y));
#ifdef TARGET_SPARC64
tcg_gen_mov_i64(dst, r_temp2);
#else
@@ -801,9 +798,10 @@
tcg_gen_mul_i64(r_temp2, r_temp, r_temp2);
tcg_gen_shri_i64(r_temp, r_temp2, 32);
- tcg_gen_trunc_i64_i32(r_temp, r_temp);
- tcg_gen_st_i32(r_temp, cpu_env, offsetof(CPUSPARCState, y));
+ tcg_gen_trunc_i64_tl(cpu_tmp0, r_temp);
tcg_temp_free(r_temp);
+ tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0xffffffff);
+ tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, y));
#ifdef TARGET_SPARC64
tcg_gen_mov_i64(dst, r_temp2);
#else
next reply other threads:[~2008-09-01 19:35 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-09-01 19:35 Blue Swirl [this message]
2008-09-01 21:39 ` [Qemu-devel] [5123] Fix y register loads and stores Vince Weaver
2008-09-01 22:28 ` Vince Weaver
2008-09-01 23:05 ` Vince Weaver
2008-09-02 16:55 ` Blue Swirl
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