From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Kb6Zy-000307-IL for qemu-devel@nongnu.org; Thu, 04 Sep 2008 00:36:22 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Kb6Zy-0002zL-1N for qemu-devel@nongnu.org; Thu, 04 Sep 2008 00:36:22 -0400 Received: from [199.232.76.173] (port=41549 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Kb6Zx-0002z6-Gn for qemu-devel@nongnu.org; Thu, 04 Sep 2008 00:36:21 -0400 Received: from savannah.gnu.org ([199.232.41.3]:54422 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Kb6Zx-0005y5-MS for qemu-devel@nongnu.org; Thu, 04 Sep 2008 00:36:21 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1Kb6Zw-0007TG-La for qemu-devel@nongnu.org; Thu, 04 Sep 2008 04:36:20 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1Kb6Zw-0007TC-DW for qemu-devel@nongnu.org; Thu, 04 Sep 2008 04:36:20 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Thu, 04 Sep 2008 04:36:20 +0000 Subject: [Qemu-devel] [5152] alpha: convert a few more instructions to TCG Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 5152 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5152 Author: aurel32 Date: 2008-09-04 04:36:20 +0000 (Thu, 04 Sep 2008) Log Message: ----------- alpha: convert a few more instructions to TCG Signed-off-by: Aurelien Jarno Modified Paths: -------------- trunk/target-alpha/op.c trunk/target-alpha/translate.c Modified: trunk/target-alpha/op.c =================================================================== --- trunk/target-alpha/op.c 2008-09-04 04:36:00 UTC (rev 5151) +++ trunk/target-alpha/op.c 2008-09-04 04:36:20 UTC (rev 5152) @@ -148,13 +148,6 @@ #include "op_mem.h" #endif -/* Special operation for load and store */ -void OPPROTO op_n7 (void) -{ - T0 &= ~(uint64_t)0x7; - RETURN(); -} - /* Misc */ void OPPROTO op_excp (void) { @@ -259,18 +252,6 @@ RETURN(); } -void OPPROTO op_s4 (void) -{ - T0 <<= 2; - RETURN(); -} - -void OPPROTO op_s8 (void) -{ - T0 <<= 3; - RETURN(); -} - void OPPROTO op_mull (void) { T0 = (int64_t)((int32_t)T0 * (int32_t)T1); @@ -646,19 +627,6 @@ RETURN(); } -/* Branches */ -void OPPROTO op_branch (void) -{ - env->pc = T0 & ~3; - RETURN(); -} - -void OPPROTO op_addq1 (void) -{ - T1 += T0; - RETURN(); -} - #if 0 // Qemu does not know how to do this... void OPPROTO op_bcond (void) { Modified: trunk/target-alpha/translate.c =================================================================== --- trunk/target-alpha/translate.c 2008-09-04 04:36:00 UTC (rev 5151) +++ trunk/target-alpha/translate.c 2008-09-04 04:36:20 UTC (rev 5152) @@ -273,15 +273,11 @@ gen_op_nop(); } else { if (rb != 31) - tcg_gen_mov_i64(cpu_T[0], cpu_ir[rb]); + tcg_gen_addi_i64(cpu_T[0], cpu_ir[rb], disp16); else - tcg_gen_movi_i64(cpu_T[0], 0); - if (disp16 != 0) { - tcg_gen_movi_i64(cpu_T[1], disp16); - gen_op_addq(); - } + tcg_gen_movi_i64(cpu_T[0], disp16); if (clear) - gen_op_n7(); + tcg_gen_andi_i64(cpu_T[0], cpu_T[0], ~0x7); (*gen_load_op)(ctx); if (ra != 31) tcg_gen_mov_i64(cpu_ir[ra], cpu_T[1]); @@ -294,15 +290,11 @@ int clear) { if (rb != 31) - tcg_gen_mov_i64(cpu_T[0], cpu_ir[rb]); + tcg_gen_addi_i64(cpu_T[0], cpu_ir[rb], disp16); else - tcg_gen_movi_i64(cpu_T[0], 0); - if (disp16 != 0) { - tcg_gen_movi_i64(cpu_T[1], disp16); - gen_op_addq(); - } + tcg_gen_movi_i64(cpu_T[0], disp16); if (clear) - gen_op_n7(); + tcg_gen_andi_i64(cpu_T[0], cpu_T[0], ~0x7); if (ra != 31) tcg_gen_mov_i64(cpu_T[1], cpu_ir[ra]); else @@ -315,13 +307,9 @@ int ra, int rb, int32_t disp16) { if (rb != 31) - tcg_gen_mov_i64(cpu_T[0], cpu_ir[rb]); + tcg_gen_addi_i64(cpu_T[0], cpu_ir[rb], disp16); else - tcg_gen_movi_i64(cpu_T[0], 0); - if (disp16 != 0) { - tcg_gen_movi_i64(cpu_T[1], disp16); - gen_op_addq(); - } + tcg_gen_movi_i64(cpu_T[0], disp16); (*gen_load_fop)(ctx); gen_store_fir(ctx, ra, 1); } @@ -331,13 +319,9 @@ int ra, int rb, int32_t disp16) { if (rb != 31) - tcg_gen_mov_i64(cpu_T[0], cpu_ir[rb]); + tcg_gen_addi_i64(cpu_T[0], cpu_ir[rb], disp16); else - tcg_gen_movi_i64(cpu_T[0], 0); - if (disp16 != 0) { - tcg_gen_movi_i64(cpu_T[1], disp16); - gen_op_addq(); - } + tcg_gen_movi_i64(cpu_T[0], disp16); gen_load_fir(ctx, ra, 1); (*gen_store_fop)(ctx); } @@ -346,13 +330,7 @@ void (*gen_test_op)(void), int ra, int32_t disp16) { - if (disp16 != 0) { - tcg_gen_movi_i64(cpu_T[0], ctx->pc); - tcg_gen_movi_i64(cpu_T[1], disp16 << 2); - gen_op_addq1(); - } else { - tcg_gen_movi_i64(cpu_T[1], ctx->pc); - } + tcg_gen_movi_i64(cpu_T[1], ctx->pc + (int64_t)(disp16 << 2)); if (ra != 31) tcg_gen_mov_i64(cpu_T[0], cpu_ir[ra]); else @@ -365,13 +343,7 @@ void (*gen_test_op)(void), int ra, int32_t disp16) { - if (disp16 != 0) { - tcg_gen_movi_i64(cpu_T[0], ctx->pc); - tcg_gen_movi_i64(cpu_T[1], disp16 << 2); - gen_op_addq1(); - } else { - tcg_gen_movi_i64(cpu_T[1], ctx->pc); - } + tcg_gen_movi_i64(cpu_T[1], ctx->pc + (int64_t)(disp16 << 2)); gen_load_fir(ctx, ra, 0); (*gen_test_op)(); _gen_op_bcond(ctx); @@ -484,50 +456,50 @@ static always_inline void gen_s4addl (void) { - gen_op_s4(); + tcg_gen_shli_i64(cpu_T[0], cpu_T[0], 2); gen_op_addl(); } static always_inline void gen_s4subl (void) { - gen_op_s4(); + tcg_gen_shli_i64(cpu_T[0], cpu_T[0], 2); gen_op_subl(); } static always_inline void gen_s8addl (void) { - gen_op_s8(); + tcg_gen_shli_i64(cpu_T[0], cpu_T[0], 3); gen_op_addl(); } static always_inline void gen_s8subl (void) { - gen_op_s8(); + tcg_gen_shli_i64(cpu_T[0], cpu_T[0], 3); gen_op_subl(); } static always_inline void gen_s4addq (void) { - gen_op_s4(); - gen_op_addq(); + tcg_gen_shli_i64(cpu_T[0], cpu_T[0], 2); + tcg_gen_add_i64(cpu_T[0], cpu_T[0], cpu_T[1]); } static always_inline void gen_s4subq (void) { - gen_op_s4(); - gen_op_subq(); + tcg_gen_shli_i64(cpu_T[0], cpu_T[0], 2); + tcg_gen_sub_i64(cpu_T[0], cpu_T[0], cpu_T[1]); } static always_inline void gen_s8addq (void) { - gen_op_s8(); - gen_op_addq(); + tcg_gen_shli_i64(cpu_T[0], cpu_T[0], 3); + tcg_gen_add_i64(cpu_T[0], cpu_T[0], cpu_T[1]); } static always_inline void gen_s8subq (void) { - gen_op_s8(); - gen_op_subq(); + tcg_gen_shli_i64(cpu_T[0], cpu_T[0], 3); + tcg_gen_sub_i64(cpu_T[0], cpu_T[0], cpu_T[1]); } static always_inline void gen_amask (void) @@ -1383,7 +1355,7 @@ else tcg_gen_movi_i64(cpu_T[0], 0); tcg_gen_movi_i64(cpu_T[1], disp12); - gen_op_addq(); + tcg_gen_add_i64(cpu_T[0], cpu_T[0], cpu_T[1]); switch ((insn >> 12) & 0xF) { case 0x0: /* Longword physical access */ @@ -1638,7 +1610,7 @@ else tcg_gen_movi_i64(cpu_T[0], 0); tcg_gen_movi_i64(cpu_T[1], (((int64_t)insn << 51) >> 51)); - gen_op_addq(); + tcg_gen_add_i64(cpu_T[0], cpu_T[0], cpu_T[1]); gen_op_hw_ret(); } ret = 2; @@ -1652,11 +1624,9 @@ if (!ctx->pal_mode) goto invalid_opc; if (ra != 31) - tcg_gen_mov_i64(cpu_T[0], cpu_ir[rb]); + tcg_gen_addi_i64(cpu_T[0], cpu_ir[rb], disp12); else - tcg_gen_movi_i64(cpu_T[0], 0); - tcg_gen_movi_i64(cpu_T[1], disp12); - gen_op_addq(); + tcg_gen_movi_i64(cpu_T[0], disp12); if (ra != 31) tcg_gen_mov_i64(cpu_T[1], cpu_ir[ra]); else