From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KbcBM-0003kl-8x for qemu-devel@nongnu.org; Fri, 05 Sep 2008 10:21:04 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KbcBK-0003je-Hn for qemu-devel@nongnu.org; Fri, 05 Sep 2008 10:21:03 -0400 Received: from [199.232.76.173] (port=35342 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KbcBK-0003jZ-E4 for qemu-devel@nongnu.org; Fri, 05 Sep 2008 10:21:02 -0400 Received: from savannah.gnu.org ([199.232.41.3]:45708 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KbcA5-0007L6-Jp for qemu-devel@nongnu.org; Fri, 05 Sep 2008 10:19:46 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1KbcA3-0007xG-Tq for qemu-devel@nongnu.org; Fri, 05 Sep 2008 14:19:44 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1KbcA3-0007xC-IN for qemu-devel@nongnu.org; Fri, 05 Sep 2008 14:19:43 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Fri, 05 Sep 2008 14:19:43 +0000 Subject: [Qemu-devel] [5167] ppc: Convert op_add, op_addi to TCG Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 5167 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5167 Author: aurel32 Date: 2008-09-05 14:19:43 +0000 (Fri, 05 Sep 2008) Log Message: ----------- ppc: Convert op_add, op_addi to TCG Replace op_add with tcg_gen_add_tl and op_addi with tcg_gen_addi_tl. Signed-off-by: Andreas Faerber Signed-off-by: Aurelien Jarno Modified Paths: -------------- trunk/target-ppc/op.c trunk/target-ppc/translate.c Modified: trunk/target-ppc/op.c =================================================================== --- trunk/target-ppc/op.c 2008-09-05 14:19:35 UTC (rev 5166) +++ trunk/target-ppc/op.c 2008-09-05 14:19:43 UTC (rev 5167) @@ -602,12 +602,6 @@ /*** Integer arithmetic ***/ /* add */ -void OPPROTO op_add (void) -{ - T0 += T1; - RETURN(); -} - void OPPROTO op_check_addo (void) { xer_ov = (((uint32_t)T2 ^ (uint32_t)T1 ^ UINT32_MAX) & @@ -664,13 +658,6 @@ } #endif -/* add immediate */ -void OPPROTO op_addi (void) -{ - T0 += (int32_t)PARAM1; - RETURN(); -} - /* add to minus one extended */ void OPPROTO op_add_me (void) { Modified: trunk/target-ppc/translate.c =================================================================== --- trunk/target-ppc/translate.c 2008-09-05 14:19:35 UTC (rev 5166) +++ trunk/target-ppc/translate.c 2008-09-05 14:19:43 UTC (rev 5167) @@ -827,10 +827,14 @@ #endif /* add add. addo addo. */ +static always_inline void gen_op_add (void) +{ + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); +} static always_inline void gen_op_addo (void) { tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); - gen_op_add(); + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); gen_op_check_addo(); } #if defined(TARGET_PPC64) @@ -838,7 +842,7 @@ static always_inline void gen_op_addo_64 (void) { tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); - gen_op_add(); + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); gen_op_check_addo_64(); } #endif @@ -847,13 +851,13 @@ static always_inline void gen_op_addc (void) { tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); - gen_op_add(); + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); gen_op_check_addc(); } static always_inline void gen_op_addco (void) { tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); - gen_op_add(); + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); gen_op_check_addc(); gen_op_check_addo(); } @@ -861,13 +865,13 @@ static always_inline void gen_op_addc_64 (void) { tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); - gen_op_add(); + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); gen_op_check_addc_64(); } static always_inline void gen_op_addco_64 (void) { tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); - gen_op_add(); + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); gen_op_check_addc_64(); gen_op_check_addo_64(); } @@ -1022,7 +1026,7 @@ } else { tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); if (likely(simm != 0)) - gen_op_addi(simm); + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm); } tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); } @@ -1034,7 +1038,7 @@ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); if (likely(simm != 0)) { tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); - gen_op_addi(simm); + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm); #if defined(TARGET_PPC64) if (ctx->sf_mode) gen_op_check_addc_64(); @@ -1054,7 +1058,7 @@ tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); if (likely(simm != 0)) { tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); - gen_op_addi(simm); + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm); #if defined(TARGET_PPC64) if (ctx->sf_mode) gen_op_check_addc_64(); @@ -1078,7 +1082,7 @@ } else { tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); if (likely(simm != 0)) - gen_op_addi(simm << 16); + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm << 16); } tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); } @@ -2118,7 +2122,7 @@ } else { tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); if (likely(simm != 0)) - gen_op_addi(simm); + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm); } #ifdef DEBUG_MEMORY_ACCESSES gen_op_print_mem_EA(); @@ -2132,7 +2136,7 @@ } else { tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]); - gen_op_add(); + tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); } #ifdef DEBUG_MEMORY_ACCESSES gen_op_print_mem_EA(); @@ -2331,7 +2335,7 @@ gen_addr_imm_index(ctx, 0x0F); op_ldst(ld); tcg_gen_mov_tl(cpu_gpr[rd], cpu_T[1]); - gen_op_addi(8); + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], 8); op_ldst(ld); tcg_gen_mov_tl(cpu_gpr[rd + 1], cpu_T[1]); #endif @@ -2427,7 +2431,7 @@ gen_addr_imm_index(ctx, 0x03); tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rs]); op_ldst(std); - gen_op_addi(8); + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], 8); tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rs + 1]); op_ldst(std); #endif @@ -5346,7 +5350,7 @@ } else { tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); if (likely(simm != 0)) - gen_op_addi(simm << sh); + tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm << sh); } }