From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [5171] fix alpha cmovxx instruction
Date: Fri, 05 Sep 2008 19:07:54 +0000 [thread overview]
Message-ID: <E1Kbgew-0007jP-9z@cvs.savannah.gnu.org> (raw)
Revision: 5171
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5171
Author: aurel32
Date: 2008-09-05 19:07:53 +0000 (Fri, 05 Sep 2008)
Log Message:
-----------
fix alpha cmovxx instruction
The CMOV instruction is defined by the alpha manual as:
CMOVxx Ra.rq,Rb.rq,Rc.wq !Operate format
CMOVxx Ra.rq,#b.ib,Rc.wq !Operate format
Operation:
IF TEST(Rav, Condition_based_on_Opcode) THEN
Rc ?\226?\134?\144 Rbv
The current qemu behavior inverses Ra and Rb. This is fixed by this
patch.
Signed-off-by: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Modified Paths:
--------------
trunk/target-alpha/translate.c
Modified: trunk/target-alpha/translate.c
===================================================================
--- trunk/target-alpha/translate.c 2008-09-05 17:17:55 UTC (rev 5170)
+++ trunk/target-alpha/translate.c 2008-09-05 19:07:53 UTC (rev 5171)
@@ -390,15 +390,15 @@
int islit, int8_t lit)
{
if (ra != 31)
- tcg_gen_mov_i64(cpu_T[1], cpu_ir[ra]);
+ tcg_gen_mov_i64(cpu_T[0], cpu_ir[ra]);
else
- tcg_gen_movi_i64(cpu_T[1], 0);
+ tcg_gen_movi_i64(cpu_T[0], 0);
if (islit)
- tcg_gen_movi_i64(cpu_T[0], lit);
+ tcg_gen_movi_i64(cpu_T[1], lit);
else if (rb != 31)
- tcg_gen_mov_i64(cpu_T[0], cpu_ir[rb]);
+ tcg_gen_mov_i64(cpu_T[1], cpu_ir[rb]);
else
- tcg_gen_movi_i64(cpu_T[0], 0);
+ tcg_gen_movi_i64(cpu_T[1], 0);
(*gen_test_op)();
gen_op_cmov_ir(rc);
}
reply other threads:[~2008-09-05 19:07 UTC|newest]
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