From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [5211] alpha: fix lit sign
Date: Sun, 14 Sep 2008 16:09:15 +0000 [thread overview]
Message-ID: <E1Keu9z-00052V-CV@cvs.savannah.gnu.org> (raw)
Revision: 5211
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5211
Author: aurel32
Date: 2008-09-14 16:09:15 +0000 (Sun, 14 Sep 2008)
Log Message:
-----------
alpha: fix lit sign
according to the alpha arch reference, the literal field of an operate
instruction is unsigned:
If bit <12> of the instruction is 1, an 8-bit zero-extended literal
constant is formed by bits
<20:13> of the instruction. The l teral is interpreted as a positive
integer bet ween 0 and 255
and is zero-extended to 64 bits.
This patch fixes the mis-interpretation of the literal field.
(Tristan Gingold)
Modified Paths:
--------------
trunk/target-alpha/translate.c
Modified: trunk/target-alpha/translate.c
===================================================================
--- trunk/target-alpha/translate.c 2008-09-14 13:59:34 UTC (rev 5210)
+++ trunk/target-alpha/translate.c 2008-09-14 16:09:15 UTC (rev 5211)
@@ -351,7 +351,7 @@
static always_inline void gen_arith2 (DisasContext *ctx,
void (*gen_arith_op)(void),
- int rb, int rc, int islit, int8_t lit)
+ int rb, int rc, int islit, uint8_t lit)
{
if (islit)
tcg_gen_movi_i64(cpu_T[0], lit);
@@ -367,7 +367,7 @@
static always_inline void gen_arith3 (DisasContext *ctx,
void (*gen_arith_op)(void),
int ra, int rb, int rc,
- int islit, int8_t lit)
+ int islit, uint8_t lit)
{
if (ra != 31)
tcg_gen_mov_i64(cpu_T[0], cpu_ir[ra]);
@@ -387,7 +387,7 @@
static always_inline void gen_cmov (DisasContext *ctx,
void (*gen_test_op)(void),
int ra, int rb, int rc,
- int islit, int8_t lit)
+ int islit, uint8_t lit)
{
if (ra != 31)
tcg_gen_mov_i64(cpu_T[0], cpu_ir[ra]);
reply other threads:[~2008-09-14 16:09 UTC|newest]
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