From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Kmv6F-0002A2-Sr for qemu-devel@nongnu.org; Mon, 06 Oct 2008 14:46:32 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Kmv6E-00028u-LW for qemu-devel@nongnu.org; Mon, 06 Oct 2008 14:46:31 -0400 Received: from [199.232.76.173] (port=46152 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Kmv6E-00028p-Dz for qemu-devel@nongnu.org; Mon, 06 Oct 2008 14:46:30 -0400 Received: from savannah.gnu.org ([199.232.41.3]:54028 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Kmv6D-0007xn-VV for qemu-devel@nongnu.org; Mon, 06 Oct 2008 14:46:30 -0400 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1Kmv6D-0002GA-Be for qemu-devel@nongnu.org; Mon, 06 Oct 2008 18:46:29 +0000 Received: from blueswir1 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1Kmv6D-0002G6-17 for qemu-devel@nongnu.org; Mon, 06 Oct 2008 18:46:29 +0000 MIME-Version: 1.0 Errors-To: blueswir1 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Blue Swirl Message-Id: Date: Mon, 06 Oct 2008 18:46:29 +0000 Subject: [Qemu-devel] [5436] Show size for unassigned accesses (Robert Reif) Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 5436 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5436 Author: blueswir1 Date: 2008-10-06 18:46:28 +0000 (Mon, 06 Oct 2008) Log Message: ----------- Show size for unassigned accesses (Robert Reif) Modified Paths: -------------- trunk/exec-all.h trunk/exec.c trunk/target-cris/cpu.h trunk/target-cris/op_helper.c trunk/target-mips/cpu.h trunk/target-mips/op_helper.c trunk/target-sparc/cpu.h trunk/target-sparc/op_helper.c Modified: trunk/exec-all.h =================================================================== --- trunk/exec-all.h 2008-10-06 18:08:30 UTC (rev 5435) +++ trunk/exec-all.h 2008-10-06 18:46:28 UTC (rev 5436) @@ -331,7 +331,7 @@ pd = env1->tlb_table[mmu_idx][page_index].addr_code & ~TARGET_PAGE_MASK; if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) { #if defined(TARGET_SPARC) || defined(TARGET_MIPS) - do_unassigned_access(addr, 0, 1, 0); + do_unassigned_access(addr, 0, 1, 0, 4); #else cpu_abort(env1, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr); #endif Modified: trunk/exec.c =================================================================== --- trunk/exec.c 2008-10-06 18:08:30 UTC (rev 5435) +++ trunk/exec.c 2008-10-06 18:46:28 UTC (rev 5436) @@ -2302,36 +2302,74 @@ #ifdef DEBUG_UNASSIGNED printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); #endif -#ifdef TARGET_SPARC - do_unassigned_access(addr, 0, 0, 0); -#elif defined(TARGET_CRIS) - do_unassigned_access(addr, 0, 0, 0); +#if defined(TARGET_SPARC) || defined(TARGET_CRIS) + do_unassigned_access(addr, 0, 0, 0, 1); #endif return 0; } +static uint32_t unassigned_mem_readw(void *opaque, target_phys_addr_t addr) +{ +#ifdef DEBUG_UNASSIGNED + printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); +#endif +#if defined(TARGET_SPARC) || defined(TARGET_CRIS) + do_unassigned_access(addr, 0, 0, 0, 2); +#endif + return 0; +} + +static uint32_t unassigned_mem_readl(void *opaque, target_phys_addr_t addr) +{ +#ifdef DEBUG_UNASSIGNED + printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); +#endif +#if defined(TARGET_SPARC) || defined(TARGET_CRIS) + do_unassigned_access(addr, 0, 0, 0, 4); +#endif + return 0; +} + static void unassigned_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) { #ifdef DEBUG_UNASSIGNED printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val); #endif -#ifdef TARGET_SPARC - do_unassigned_access(addr, 1, 0, 0); -#elif defined(TARGET_CRIS) - do_unassigned_access(addr, 1, 0, 0); +#if defined(TARGET_SPARC) || defined(TARGET_CRIS) + do_unassigned_access(addr, 1, 0, 0, 1); #endif } +static void unassigned_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val) +{ +#ifdef DEBUG_UNASSIGNED + printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val); +#endif +#if defined(TARGET_SPARC) || defined(TARGET_CRIS) + do_unassigned_access(addr, 1, 0, 0, 2); +#endif +} + +static void unassigned_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) +{ +#ifdef DEBUG_UNASSIGNED + printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val); +#endif +#if defined(TARGET_SPARC) || defined(TARGET_CRIS) + do_unassigned_access(addr, 1, 0, 0, 4); +#endif +} + static CPUReadMemoryFunc *unassigned_mem_read[3] = { unassigned_mem_readb, - unassigned_mem_readb, - unassigned_mem_readb, + unassigned_mem_readw, + unassigned_mem_readl, }; static CPUWriteMemoryFunc *unassigned_mem_write[3] = { unassigned_mem_writeb, - unassigned_mem_writeb, - unassigned_mem_writeb, + unassigned_mem_writew, + unassigned_mem_writel, }; static void notdirty_mem_writeb(void *opaque, target_phys_addr_t ram_addr, Modified: trunk/target-cris/cpu.h =================================================================== --- trunk/target-cris/cpu.h 2008-10-06 18:08:30 UTC (rev 5435) +++ trunk/target-cris/cpu.h 2008-10-06 18:46:28 UTC (rev 5436) @@ -168,7 +168,7 @@ int cpu_cris_signal_handler(int host_signum, void *pinfo, void *puc); void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, - int is_asi); + int is_asi, int size); enum { CC_OP_DYNAMIC, /* Use env->cc_op */ Modified: trunk/target-cris/op_helper.c =================================================================== --- trunk/target-cris/op_helper.c 2008-10-06 18:08:30 UTC (rev 5435) +++ trunk/target-cris/op_helper.c 2008-10-06 18:46:28 UTC (rev 5436) @@ -237,10 +237,10 @@ } void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, - int is_asi) + int is_asi, int size) { - D(printf("%s addr=%x w=%d ex=%d asi=%d\n", - __func__, addr, is_write, is_exec, is_asi)); + D(printf("%s addr=%x w=%d ex=%d asi=%d, size=%d\n", + __func__, addr, is_write, is_exec, is_asi, size)); } static void evaluate_flags_writeback(uint32_t flags) Modified: trunk/target-mips/cpu.h =================================================================== --- trunk/target-mips/cpu.h 2008-10-06 18:08:30 UTC (rev 5435) +++ trunk/target-mips/cpu.h 2008-10-06 18:46:28 UTC (rev 5436) @@ -470,7 +470,7 @@ void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, - int unused); + int unused, int size); #define CPUState CPUMIPSState #define cpu_init cpu_mips_init Modified: trunk/target-mips/op_helper.c =================================================================== --- trunk/target-mips/op_helper.c 2008-10-06 18:08:30 UTC (rev 5435) +++ trunk/target-mips/op_helper.c 2008-10-06 18:46:28 UTC (rev 5436) @@ -1911,7 +1911,7 @@ } void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, - int unused) + int unused, int size) { if (is_exec) do_raise_exception(EXCP_IBE); Modified: trunk/target-sparc/cpu.h =================================================================== --- trunk/target-sparc/cpu.h 2008-10-06 18:08:30 UTC (rev 5435) +++ trunk/target-sparc/cpu.h 2008-10-06 18:46:28 UTC (rev 5436) @@ -430,7 +430,7 @@ /* cpu-exec.c */ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, - int is_asi); + int is_asi, int size); int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); #define CPUState CPUSPARCState Modified: trunk/target-sparc/op_helper.c =================================================================== --- trunk/target-sparc/op_helper.c 2008-10-06 18:08:30 UTC (rev 5435) +++ trunk/target-sparc/op_helper.c 2008-10-06 18:46:28 UTC (rev 5436) @@ -950,7 +950,7 @@ break; case 8: /* User code access, XXX */ default: - do_unassigned_access(addr, 0, 0, asi); + do_unassigned_access(addr, 0, 0, asi, size); ret = 0; break; } @@ -1284,7 +1284,7 @@ case 8: /* User code access, XXX */ case 9: /* Supervisor code access, XXX */ default: - do_unassigned_access(addr, 1, 0, asi); + do_unassigned_access(addr, 1, 0, asi, size); break; } #ifdef DEBUG_ASI @@ -1464,7 +1464,7 @@ case 0x8a: // Primary no-fault LE, RO case 0x8b: // Secondary no-fault LE, RO default: - do_unassigned_access(addr, 1, 0, 1); + do_unassigned_access(addr, 1, 0, 1, size); return; } } @@ -1675,7 +1675,7 @@ case 0x5f: // D-MMU demap, WO case 0x77: // Interrupt vector, WO default: - do_unassigned_access(addr, 0, 0, 1); + do_unassigned_access(addr, 0, 0, 1, size); ret = 0; break; } @@ -2082,7 +2082,7 @@ case 0x8a: // Primary no-fault LE, RO case 0x8b: // Secondary no-fault LE, RO default: - do_unassigned_access(addr, 1, 0, 1); + do_unassigned_access(addr, 1, 0, 1, size); return; } } @@ -3025,7 +3025,7 @@ #ifndef TARGET_SPARC64 void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, - int is_asi) + int is_asi, int size) { CPUState *saved_env; @@ -3035,14 +3035,15 @@ env = cpu_single_env; #ifdef DEBUG_UNASSIGNED if (is_asi) - printf("Unassigned mem %s access to " TARGET_FMT_plx + printf("Unassigned mem %s access of %d byte%s to " TARGET_FMT_plx " asi 0x%02x from " TARGET_FMT_lx "\n", - is_exec ? "exec" : is_write ? "write" : "read", addr, is_asi, - env->pc); + is_exec ? "exec" : is_write ? "write" : "read", size, + size == 1 ? "" : "s", addr, is_asi, env->pc); else - printf("Unassigned mem %s access to " TARGET_FMT_plx " from " - TARGET_FMT_lx "\n", - is_exec ? "exec" : is_write ? "write" : "read", addr, env->pc); + printf("Unassigned mem %s access of %d byte%s to " TARGET_FMT_plx + " from " TARGET_FMT_lx "\n", + is_exec ? "exec" : is_write ? "write" : "read", size, + size == 1 ? "" : "s", addr, env->pc); #endif if (env->mmuregs[3]) /* Fault status register */ env->mmuregs[3] = 1; /* overflow (not read before another fault) */ @@ -3066,7 +3067,7 @@ } #else void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec, - int is_asi) + int is_asi, int size) { #ifdef DEBUG_UNASSIGNED CPUState *saved_env;