From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [5598] tcg-ops.h: _i64 TCG immediate instructions cleanup
Date: Sun, 02 Nov 2008 08:22:55 +0000 [thread overview]
Message-ID: <E1KwYEZ-0006wU-Fq@cvs.savannah.gnu.org> (raw)
Revision: 5598
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5598
Author: aurel32
Date: 2008-11-02 08:22:54 +0000 (Sun, 02 Nov 2008)
Log Message:
-----------
tcg-ops.h: _i64 TCG immediate instructions cleanup
Move addi_i64, muli_i64 and subi_i64 out of #if TCG_TARGET_REG_BITS
as both implementations are strictly identical. Use the same
optimisation (ie when imm == 0) for addi_i64 and subi_64 than the
32-bit version.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Modified Paths:
--------------
trunk/tcg/tcg-op.h
Modified: trunk/tcg/tcg-op.h
===================================================================
--- trunk/tcg/tcg-op.h 2008-11-02 08:22:45 UTC (rev 5597)
+++ trunk/tcg/tcg-op.h 2008-11-02 08:22:54 UTC (rev 5598)
@@ -673,26 +673,12 @@
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2));
}
-static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2)
-{
- TCGv t0 = tcg_const_i64(arg2);
- tcg_gen_add_i64(ret, arg1, t0);
- tcg_temp_free(t0);
-}
-
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2)
{
tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret),
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2));
}
-static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2)
-{
- TCGv t0 = tcg_const_i64(arg2);
- tcg_gen_sub_i64(ret, arg1, t0);
- tcg_temp_free(t0);
-}
-
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2)
{
tcg_gen_and_i32(ret, arg1, arg2);
@@ -788,13 +774,6 @@
tcg_temp_free(t1);
}
-static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2)
-{
- TCGv t0 = tcg_const_i64(arg2);
- tcg_gen_mul_i64(ret, arg1, t0);
- tcg_temp_free(t0);
-}
-
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2)
{
tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2);
@@ -897,25 +876,11 @@
tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2);
}
-static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2)
-{
- TCGv t0 = tcg_const_i64(arg2);
- tcg_gen_add_i64(ret, arg1, t0);
- tcg_temp_free(t0);
-}
-
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2)
{
tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2);
}
-static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2)
-{
- TCGv t0 = tcg_const_i64(arg2);
- tcg_gen_sub_i64(ret, arg1, t0);
- tcg_temp_free(t0);
-}
-
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2)
{
tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2);
@@ -1011,13 +976,6 @@
tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2);
}
-static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2)
-{
- TCGv t0 = tcg_const_i64(arg2);
- tcg_gen_mul_i64(ret, arg1, t0);
- tcg_temp_free(t0);
-}
-
#ifdef TCG_TARGET_HAS_div_i64
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2)
{
@@ -1078,6 +1036,18 @@
#endif
+static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2)
+{
+ /* some cases can be optimized here */
+ if (arg2 == 0) {
+ tcg_gen_mov_i64(ret, arg1);
+ } else {
+ TCGv t0 = tcg_const_i64(arg2);
+ tcg_gen_add_i64(ret, arg1, t0);
+ tcg_temp_free(t0);
+ }
+}
+
static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2,
int label_index)
{
@@ -1086,6 +1056,25 @@
tcg_temp_free(t0);
}
+static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2)
+{
+ TCGv t0 = tcg_const_i64(arg2);
+ tcg_gen_mul_i64(ret, arg1, t0);
+ tcg_temp_free(t0);
+}
+
+static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2)
+{
+ /* some cases can be optimized here */
+ if (arg2 == 0) {
+ tcg_gen_mov_i64(ret, arg1);
+ } else {
+ TCGv t0 = tcg_const_i64(arg2);
+ tcg_gen_sub_i64(ret, arg1, t0);
+ tcg_temp_free(t0);
+ }
+}
+
/***************************************/
/* optional operations */
reply other threads:[~2008-11-02 8:22 UTC|newest]
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