From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KyRt5-0000NT-Rs for qemu-devel@nongnu.org; Fri, 07 Nov 2008 09:00:36 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KyRt5-0000Mi-2Y for qemu-devel@nongnu.org; Fri, 07 Nov 2008 09:00:35 -0500 Received: from [199.232.76.173] (port=60471 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KyRt4-0000MN-Ar for qemu-devel@nongnu.org; Fri, 07 Nov 2008 09:00:34 -0500 Received: from savannah.gnu.org ([199.232.41.3]:46026 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KyRt3-0006en-VC for qemu-devel@nongnu.org; Fri, 07 Nov 2008 09:00:34 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1KyRt2-0002JE-GF for qemu-devel@nongnu.org; Fri, 07 Nov 2008 14:00:32 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1KyRt0-0002J6-KF for qemu-devel@nongnu.org; Fri, 07 Nov 2008 14:00:31 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Fri, 07 Nov 2008 14:00:30 +0000 Subject: [Qemu-devel] [5645] target-alpha: fix locked loads/stores Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 5645 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5645 Author: aurel32 Date: 2008-11-07 14:00:24 +0000 (Fri, 07 Nov 2008) Log Message: ----------- target-alpha: fix locked loads/stores Fix reading of cpu_lock in gen_qemu_stql_c, original patch from Laurent Desnogues. A new flag was added to gen_store_mem to allocate local temps instead of temps; this flag should be set when the tcg_gen_qemu_store callback uses brcond before using the temps or else liveness analysis will get rid of the temps. This also adds lock printing in cpu_dump_state which can help debug. Modified Paths: -------------- trunk/target-alpha/helper.c trunk/target-alpha/translate.c Modified: trunk/target-alpha/helper.c =================================================================== --- trunk/target-alpha/helper.c 2008-11-07 13:48:25 UTC (rev 5644) +++ trunk/target-alpha/helper.c 2008-11-07 14:00:24 UTC (rev 5645) @@ -434,5 +434,6 @@ if ((i % 3) == 2) cpu_fprintf(f, "\n"); } + cpu_fprintf(f, "\nlock " TARGET_FMT_lx "\n", env->lock); } Modified: trunk/target-alpha/translate.c =================================================================== --- trunk/target-alpha/translate.c 2008-11-07 13:48:25 UTC (rev 5644) +++ trunk/target-alpha/translate.c 2008-11-07 14:00:24 UTC (rev 5645) @@ -234,9 +234,13 @@ static always_inline void gen_store_mem (DisasContext *ctx, void (*tcg_gen_qemu_store)(TCGv t0, TCGv t1, int flags), int ra, int rb, int32_t disp16, - int fp, int clear) + int fp, int clear, int local) { TCGv addr = tcg_temp_new(TCG_TYPE_I64); + if (local) + addr = tcg_temp_local_new(TCG_TYPE_I64); + else + addr = tcg_temp_new(TCG_TYPE_I64); if (rb != 31) { tcg_gen_addi_i64(addr, cpu_ir[rb], disp16); if (clear) @@ -252,7 +256,11 @@ else tcg_gen_qemu_store(cpu_ir[ra], addr, ctx->mem_idx); } else { - TCGv zero = tcg_const_i64(0); + TCGv zero; + if (local) + zero = tcg_const_local_i64(0); + else + zero = tcg_const_i64(0); tcg_gen_qemu_store(zero, addr, ctx->mem_idx); tcg_temp_free(zero); } @@ -636,15 +644,15 @@ break; case 0x0D: /* STW */ - gen_store_mem(ctx, &tcg_gen_qemu_st16, ra, rb, disp16, 0, 0); + gen_store_mem(ctx, &tcg_gen_qemu_st16, ra, rb, disp16, 0, 0, 0); break; case 0x0E: /* STB */ - gen_store_mem(ctx, &tcg_gen_qemu_st8, ra, rb, disp16, 0, 0); + gen_store_mem(ctx, &tcg_gen_qemu_st8, ra, rb, disp16, 0, 0, 0); break; case 0x0F: /* STQ_U */ - gen_store_mem(ctx, &tcg_gen_qemu_st64, ra, rb, disp16, 0, 1); + gen_store_mem(ctx, &tcg_gen_qemu_st64, ra, rb, disp16, 0, 1, 0); break; case 0x10: switch (fn7) { @@ -2090,19 +2098,19 @@ break; case 0x24: /* STF */ - gen_store_mem(ctx, &gen_qemu_stf, ra, rb, disp16, 1, 0); + gen_store_mem(ctx, &gen_qemu_stf, ra, rb, disp16, 1, 0, 0); break; case 0x25: /* STG */ - gen_store_mem(ctx, &gen_qemu_stg, ra, rb, disp16, 1, 0); + gen_store_mem(ctx, &gen_qemu_stg, ra, rb, disp16, 1, 0, 0); break; case 0x26: /* STS */ - gen_store_mem(ctx, &gen_qemu_sts, ra, rb, disp16, 1, 0); + gen_store_mem(ctx, &gen_qemu_sts, ra, rb, disp16, 1, 0, 0); break; case 0x27: /* STT */ - gen_store_mem(ctx, &tcg_gen_qemu_st64, ra, rb, disp16, 1, 0); + gen_store_mem(ctx, &tcg_gen_qemu_st64, ra, rb, disp16, 1, 0, 0); break; case 0x28: /* LDL */ @@ -2122,19 +2130,19 @@ break; case 0x2C: /* STL */ - gen_store_mem(ctx, &tcg_gen_qemu_st32, ra, rb, disp16, 0, 0); + gen_store_mem(ctx, &tcg_gen_qemu_st32, ra, rb, disp16, 0, 0, 0); break; case 0x2D: /* STQ */ - gen_store_mem(ctx, &tcg_gen_qemu_st64, ra, rb, disp16, 0, 0); + gen_store_mem(ctx, &tcg_gen_qemu_st64, ra, rb, disp16, 0, 0, 0); break; case 0x2E: /* STL_C */ - gen_store_mem(ctx, &gen_qemu_stl_c, ra, rb, disp16, 0, 0); + gen_store_mem(ctx, &gen_qemu_stl_c, ra, rb, disp16, 0, 0, 1); break; case 0x2F: /* STQ_C */ - gen_store_mem(ctx, &gen_qemu_stq_c, ra, rb, disp16, 0, 0); + gen_store_mem(ctx, &gen_qemu_stq_c, ra, rb, disp16, 0, 0, 1); break; case 0x30: /* BR */