From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Kyjdg-0003Ym-2Q for qemu-devel@nongnu.org; Sat, 08 Nov 2008 03:57:52 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Kyjdd-0003Xq-OL for qemu-devel@nongnu.org; Sat, 08 Nov 2008 03:57:50 -0500 Received: from [199.232.76.173] (port=47754 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Kyjdc-0003Xd-8J for qemu-devel@nongnu.org; Sat, 08 Nov 2008 03:57:48 -0500 Received: from savannah.gnu.org ([199.232.41.3]:55035 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Kyjdb-0001Ga-L4 for qemu-devel@nongnu.org; Sat, 08 Nov 2008 03:57:47 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1Kyjda-0003Bw-Pt for qemu-devel@nongnu.org; Sat, 08 Nov 2008 08:57:46 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1Kyjda-0003Bs-BZ for qemu-devel@nongnu.org; Sat, 08 Nov 2008 08:57:46 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Sat, 08 Nov 2008 08:57:46 +0000 Subject: [Qemu-devel] [5648] target-ppc: fix tcg fatal error on i386 host Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 5648 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5648 Author: aurel32 Date: 2008-11-08 08:57:45 +0000 (Sat, 08 Nov 2008) Log Message: ----------- target-ppc: fix tcg fatal error on i386 host It looks like the i386 runs out of registers for allocation due to too many global registers allocated by the ppc target. Here is a quick and dirty fix that seems to solve the problem. This should be considered as temporary. Signed-off-by: Laurent Desnogues Modified Paths: -------------- trunk/target-ppc/cpu.h trunk/target-ppc/translate.c Modified: trunk/target-ppc/cpu.h =================================================================== --- trunk/target-ppc/cpu.h 2008-11-07 23:05:14 UTC (rev 5647) +++ trunk/target-ppc/cpu.h 2008-11-08 08:57:45 UTC (rev 5648) @@ -530,8 +530,12 @@ * during translated code execution */ #if TARGET_LONG_BITS > HOST_LONG_BITS - target_ulong t0, t1, t2; + target_ulong t0, t1; #endif + /* XXX: this is a temporary workaround for i386. cf translate.c comment */ +#if (TARGET_LONG_BITS > HOST_LONG_BITS) || defined(HOST_I386) + target_ulong t2; +#endif #if !defined(TARGET_PPC64) /* temporary fixed-point registers * used to emulate 64 bits registers on 32 bits targets Modified: trunk/target-ppc/translate.c =================================================================== --- trunk/target-ppc/translate.c 2008-11-07 23:05:14 UTC (rev 5647) +++ trunk/target-ppc/translate.c 2008-11-08 08:57:45 UTC (rev 5648) @@ -97,8 +97,17 @@ #else cpu_T[0] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG1, "T0"); cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1"); +#ifdef HOST_I386 + /* XXX: This is a temporary workaround for i386. + * On i386 qemu_st32 runs out of registers. + * The proper fix is to remove cpu_T. + */ + cpu_T[2] = tcg_global_mem_new(TCG_TYPE_TL, + TCG_AREG0, offsetof(CPUState, t2), "T2"); +#else cpu_T[2] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG3, "T2"); #endif +#endif #if !defined(TARGET_PPC64) cpu_T64[0] = tcg_global_mem_new(TCG_TYPE_I64, TCG_AREG0, offsetof(CPUState, t0_64),