From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KzjYq-00021D-Kp for qemu-devel@nongnu.org; Mon, 10 Nov 2008 22:05:00 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KzjYp-0001zp-20 for qemu-devel@nongnu.org; Mon, 10 Nov 2008 22:04:59 -0500 Received: from [199.232.76.173] (port=59905 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KzjYo-0001zl-TN for qemu-devel@nongnu.org; Mon, 10 Nov 2008 22:04:58 -0500 Received: from savannah.gnu.org ([199.232.41.3]:50734 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KzjYo-0006rS-Hw for qemu-devel@nongnu.org; Mon, 10 Nov 2008 22:04:58 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1KzjYo-0003ct-2O for qemu-devel@nongnu.org; Tue, 11 Nov 2008 03:04:58 +0000 Received: from malc by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1KzjYn-0003cp-Od for qemu-devel@nongnu.org; Tue, 11 Nov 2008 03:04:57 +0000 MIME-Version: 1.0 Errors-To: malc Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: malc Message-Id: Date: Tue, 11 Nov 2008 03:04:57 +0000 Subject: [Qemu-devel] [5670] Fix alignment problem with some 64bit load/store instructions Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 5670 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5670 Author: malc Date: 2008-11-11 03:04:57 +0000 (Tue, 11 Nov 2008) Log Message: ----------- Fix alignment problem with some 64bit load/store instructions LD/STD/LWA require displacement to be multiple of 4, provide tcg_out_ldsta which checks the supplied displacement and falls back on indexed variant when the check fails. All uses of LD/STD/LWA outside of tcg_out_ldst appear to be safe. Modified Paths: -------------- trunk/tcg/ppc64/tcg-target.c Modified: trunk/tcg/ppc64/tcg-target.c =================================================================== --- trunk/tcg/ppc64/tcg-target.c 2008-11-10 15:55:14 UTC (rev 5669) +++ trunk/tcg/ppc64/tcg-target.c 2008-11-11 03:04:57 UTC (rev 5670) @@ -497,6 +497,17 @@ } } +static void tcg_out_ldsta (TCGContext *s, int ret, int addr, + int offset, int op1, int op2) +{ + if (offset == (int16_t) (offset & ~3)) + tcg_out32 (s, op1 | RT (ret) | RA (addr) | (offset & 0xffff)); + else { + tcg_out_movi (s, TCG_TYPE_I64, 0, offset); + tcg_out32 (s, op2 | RT (ret) | RA (addr) | RB (0)); + } +} + static void tcg_out_b (TCGContext *s, int mask, tcg_target_long target) { tcg_target_long disp; @@ -860,7 +871,7 @@ if (type == TCG_TYPE_I32) tcg_out_ldst (s, ret, arg1, arg2, LWZ, LWZX); else - tcg_out_ldst (s, ret, arg1, arg2, LD, LDX); + tcg_out_ldsta (s, ret, arg1, arg2, LD, LDX); } static void tcg_out_st (TCGContext *s, TCGType type, int arg, int arg1, @@ -869,7 +880,7 @@ if (type == TCG_TYPE_I32) tcg_out_ldst (s, arg, arg1, arg2, STW, STWX); else - tcg_out_ldst (s, arg, arg1, arg2, STD, STDX); + tcg_out_ldsta (s, arg, arg1, arg2, STD, STDX); } static void ppc_addi32 (TCGContext *s, int rt, int ra, tcg_target_long si) @@ -1088,10 +1099,10 @@ tcg_out_ldst (s, args[0], args[1], args[2], LWZ, LWZX); break; case INDEX_op_ld32s_i64: - tcg_out_ldst (s, args[0], args[1], args[2], LWA, LWAX); + tcg_out_ldsta (s, args[0], args[1], args[2], LWA, LWAX); break; case INDEX_op_ld_i64: - tcg_out_ldst (s, args[0], args[1], args[2], LD, LDX); + tcg_out_ldsta (s, args[0], args[1], args[2], LD, LDX); break; case INDEX_op_st8_i32: case INDEX_op_st8_i64: @@ -1106,7 +1117,7 @@ tcg_out_ldst (s, args[0], args[1], args[2], STW, STWX); break; case INDEX_op_st_i64: - tcg_out_ldst (s, args[0], args[1], args[2], STD, STDX); + tcg_out_ldsta (s, args[0], args[1], args[2], STD, STDX); break; case INDEX_op_add_i32: