From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KzrYE-0000Xe-H1 for qemu-devel@nongnu.org; Tue, 11 Nov 2008 06:36:54 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KzrYD-0000XB-Tm for qemu-devel@nongnu.org; Tue, 11 Nov 2008 06:36:54 -0500 Received: from [199.232.76.173] (port=55163 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KzrYD-0000X6-N6 for qemu-devel@nongnu.org; Tue, 11 Nov 2008 06:36:53 -0500 Received: from savannah.gnu.org ([199.232.41.3]:43926 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KzrYD-0004w1-5F for qemu-devel@nongnu.org; Tue, 11 Nov 2008 06:36:53 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1KzrYC-0003Jt-HY for qemu-devel@nongnu.org; Tue, 11 Nov 2008 11:36:52 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1KzrYC-0003Jp-8q for qemu-devel@nongnu.org; Tue, 11 Nov 2008 11:36:52 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Tue, 11 Nov 2008 11:36:52 +0000 Subject: [Qemu-devel] [5676] target-mips: optimize gen_op_addr_add() (1/2) Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 5676 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5676 Author: aurel32 Date: 2008-11-11 11:36:52 +0000 (Tue, 11 Nov 2008) Log Message: ----------- target-mips: optimize gen_op_addr_add() (1/2) The user mode can be tested at translation time using ctx->hflags. This simplifies gen_op_addr_add(). Signed-off-by: Aurelien Jarno Modified Paths: -------------- trunk/target-mips/translate.c Modified: trunk/target-mips/translate.c =================================================================== --- trunk/target-mips/translate.c 2008-11-11 11:36:04 UTC (rev 5675) +++ trunk/target-mips/translate.c 2008-11-11 11:36:52 UTC (rev 5676) @@ -894,7 +894,7 @@ } /* Addresses computation */ -static inline void gen_op_addr_add (TCGv t0, TCGv t1) +static inline void gen_op_addr_add (DisasContext *ctx, TCGv t0, TCGv t1) { tcg_gen_add_tl(t0, t0, t1); @@ -902,19 +902,16 @@ /* For compatibility with 32-bit code, data reference in user mode with Status_UX = 0 should be casted to 32-bit and sign extended. See the MIPS64 PRA manual, section 4.10. */ - { + if ((ctx->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_UM) { int l1 = gen_new_label(); - TCGv r_tmp = tcg_temp_local_new(TCG_TYPE_I32); + TCGv r_tmp = tcg_temp_new(TCG_TYPE_I32); - tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, hflags)); - tcg_gen_andi_i32(r_tmp, r_tmp, MIPS_HFLAG_KSU); - tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, MIPS_HFLAG_UM, l1); tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, CP0_Status)); tcg_gen_andi_i32(r_tmp, r_tmp, (1 << CP0St_UX)); tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, 0, l1); - tcg_temp_free(r_tmp); tcg_gen_ext32s_i64(t0, t0); gen_set_label(l1); + tcg_temp_free(r_tmp); } #endif } @@ -1070,7 +1067,7 @@ } else { gen_load_gpr(t0, base); tcg_gen_movi_tl(t1, offset); - gen_op_addr_add(t0, t1); + gen_op_addr_add(ctx, t0, t1); } /* Don't do NOP if destination is zero: we must perform the actual memory access. */ @@ -1235,7 +1232,7 @@ gen_load_gpr(t0, base); tcg_gen_movi_tl(t1, offset); - gen_op_addr_add(t0, t1); + gen_op_addr_add(ctx, t0, t1); tcg_temp_free(t1); } /* Don't do NOP if destination is zero: we must perform the actual @@ -7369,7 +7366,7 @@ } else { gen_load_gpr(t0, base); gen_load_gpr(t1, index); - gen_op_addr_add(t0, t1); + gen_op_addr_add(ctx, t0, t1); } /* Don't do NOP if destination is zero: we must perform the actual memory access. */