From: Blue Swirl <blauwirbel@gmail.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [5812] Fix configuration 2 register (esp_2_cfg2.diff):
Date: Sat, 29 Nov 2008 16:48:29 +0000 [thread overview]
Message-ID: <E1L6Szd-0000kB-I2@cvs.savannah.gnu.org> (raw)
Revision: 5812
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5812
Author: blueswir1
Date: 2008-11-29 16:48:29 +0000 (Sat, 29 Nov 2008)
Log Message:
-----------
Fix configuration 2 register (esp_2_cfg2.diff):
According to http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt,
"Any bit pattern written to this register may be read back and should be identical"
Signed-off-by: Herve Poussineau <hpoussin@reactos.org>
Modified Paths:
--------------
trunk/hw/esp.c
Modified: trunk/hw/esp.c
===================================================================
--- trunk/hw/esp.c 2008-11-29 16:45:28 UTC (rev 5811)
+++ trunk/hw/esp.c 2008-11-29 16:48:29 UTC (rev 5812)
@@ -144,8 +144,6 @@
#define CFG1_RESREPT 0x40
-#define CFG2_MASK 0x15
-
#define TCHI_FAS100A 0x4
static void esp_raise_irq(ESPState *s)
@@ -552,10 +550,7 @@
break;
case ESP_WCCF ... ESP_WTEST:
break;
- case ESP_CFG2:
- s->rregs[saddr] = val & CFG2_MASK;
- break;
- case ESP_CFG3 ... ESP_RES4:
+ case ESP_CFG2 ... ESP_RES4:
s->rregs[saddr] = val;
break;
default:
reply other threads:[~2008-11-29 16:48 UTC|newest]
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