From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1L95Cy-0000R4-NH for qemu-devel@nongnu.org; Sat, 06 Dec 2008 17:01:04 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1L95Cx-0000Qr-8g for qemu-devel@nongnu.org; Sat, 06 Dec 2008 17:01:04 -0500 Received: from [199.232.76.173] (port=57499 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1L95Cx-0000Qo-5b for qemu-devel@nongnu.org; Sat, 06 Dec 2008 17:01:03 -0500 Received: from savannah.gnu.org ([199.232.41.3]:33624 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1L95Cw-0003fP-Kr for qemu-devel@nongnu.org; Sat, 06 Dec 2008 17:01:02 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1L95Cv-0007Jc-Ph for qemu-devel@nongnu.org; Sat, 06 Dec 2008 22:01:01 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1L95Cv-0007JL-EY for qemu-devel@nongnu.org; Sat, 06 Dec 2008 22:01:01 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Sat, 06 Dec 2008 22:01:01 +0000 Subject: [Qemu-devel] [5896] target-ppc: remove dead code Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 5896 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5896 Author: aurel32 Date: 2008-12-06 22:01:01 +0000 (Sat, 06 Dec 2008) Log Message: ----------- target-ppc: remove dead code Signed-off-by: Aurelien Jarno Modified Paths: -------------- trunk/target-ppc/cpu.h trunk/target-ppc/exec.h trunk/target-ppc/op_helper.h trunk/target-ppc/translate.c Modified: trunk/target-ppc/cpu.h =================================================================== --- trunk/target-ppc/cpu.h 2008-12-06 21:46:17 UTC (rev 5895) +++ trunk/target-ppc/cpu.h 2008-12-06 22:01:01 UTC (rev 5896) @@ -530,12 +530,8 @@ * during translated code execution */ #if TARGET_LONG_BITS > HOST_LONG_BITS - target_ulong t0, t1; + target_ulong t0; #endif - /* XXX: this is a temporary workaround for i386. cf translate.c comment */ -#if (TARGET_LONG_BITS > HOST_LONG_BITS) || defined(HOST_I386) - target_ulong t2; -#endif /* general purpose registers */ target_ulong gpr[32]; Modified: trunk/target-ppc/exec.h =================================================================== --- trunk/target-ppc/exec.h 2008-12-06 21:46:17 UTC (rev 5895) +++ trunk/target-ppc/exec.h 2008-12-06 22:01:01 UTC (rev 5896) @@ -35,13 +35,9 @@ #if TARGET_LONG_BITS > HOST_LONG_BITS /* no registers can be used */ #define T0 (env->t0) -#define T1 (env->t1) -#define T2 (env->t2) #define TDX "%016" PRIx64 #else register target_ulong T0 asm(AREG1); -register target_ulong T1 asm(AREG2); -register target_ulong T2 asm(AREG3); #define TDX "%016lx" #endif Modified: trunk/target-ppc/op_helper.h =================================================================== --- trunk/target-ppc/op_helper.h 2008-12-06 21:46:17 UTC (rev 5895) +++ trunk/target-ppc/op_helper.h 2008-12-06 22:01:01 UTC (rev 5896) @@ -18,8 +18,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -void do_print_mem_EA (target_ulong EA); - /* Registers load and stores */ #if defined(TARGET_PPC64) void do_store_pri (int prio); @@ -30,7 +28,6 @@ /* Misc */ /* POWER / PowerPC 601 specific helpers */ #if !defined(CONFIG_USER_ONLY) -void do_POWER_rac (void); void do_store_hid0_601 (void); #endif Modified: trunk/target-ppc/translate.c =================================================================== --- trunk/target-ppc/translate.c 2008-12-06 21:46:17 UTC (rev 5895) +++ trunk/target-ppc/translate.c 2008-12-06 22:01:01 UTC (rev 5896) @@ -72,7 +72,7 @@ static TCGv_i32 cpu_access_type; /* dyngen register indexes */ -static TCGv cpu_T[3]; +static TCGv cpu_T[1]; #include "gen-icount.h" @@ -88,21 +88,9 @@ cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); #if TARGET_LONG_BITS > HOST_LONG_BITS cpu_T[0] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, t0), "T0"); - cpu_T[1] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, t1), "T1"); - cpu_T[2] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, t2), "T2"); #else cpu_T[0] = tcg_global_reg_new(TCG_AREG1, "T0"); - cpu_T[1] = tcg_global_reg_new(TCG_AREG2, "T1"); -#ifdef HOST_I386 - /* XXX: This is a temporary workaround for i386. - * On i386 qemu_st32 runs out of registers. - * The proper fix is to remove cpu_T. - */ - cpu_T[2] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, t2), "T2"); -#else - cpu_T[2] = tcg_global_reg_new(TCG_AREG3, "T2"); #endif -#endif p = cpu_reg_names;