From: Andrzej Zaborowski <balrogg@gmail.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [5905] omap1: add OSC_12M_SEL UART register support ( original patch from Jean-Christophe PLAGNIOL-VILLARD)
Date: Sun, 07 Dec 2008 12:49:27 +0000 [thread overview]
Message-ID: <E1L9J4h-0004YB-G8@cvs.savannah.gnu.org> (raw)
Revision: 5905
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5905
Author: balrog
Date: 2008-12-07 12:49:26 +0000 (Sun, 07 Dec 2008)
Log Message:
-----------
omap1: add OSC_12M_SEL UART register support (original patch from Jean-Christophe PLAGNIOL-VILLARD)
Modified Paths:
--------------
trunk/hw/omap1.c
Modified: trunk/hw/omap1.c
===================================================================
--- trunk/hw/omap1.c 2008-12-07 12:36:28 UTC (rev 5904)
+++ trunk/hw/omap1.c 2008-12-07 12:49:26 UTC (rev 5905)
@@ -1966,6 +1966,7 @@
uint8_t cfps;
uint8_t mdr[2];
uint8_t scr;
+ uint8_t clksel;
};
void omap_uart_reset(struct omap_uart_s *s)
@@ -1974,6 +1975,7 @@
s->syscontrol = 0;
s->wkup = 0x3f;
s->cfps = 0x69;
+ s->clksel = 0;
}
struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
@@ -2006,17 +2008,19 @@
return s->scr;
case 0x44: /* SSR */
return 0x0;
- case 0x48: /* EBLR */
+ case 0x48: /* EBLR (OMAP2) */
return s->eblr;
+ case 0x4C: /* OSC_12M_SEL (OMAP1) */
+ return s->clksel;
case 0x50: /* MVR */
return 0x30;
- case 0x54: /* SYSC */
+ case 0x54: /* SYSC (OMAP2) */
return s->syscontrol;
- case 0x58: /* SYSS */
+ case 0x58: /* SYSS (OMAP2) */
return 1;
- case 0x5c: /* WER */
+ case 0x5c: /* WER (OMAP2) */
return s->wkup;
- case 0x60: /* CFPS */
+ case 0x60: /* CFPS (OMAP2) */
return s->cfps;
}
@@ -2040,23 +2044,26 @@
case 0x40: /* SCR */
s->scr = value & 0xff;
break;
- case 0x48: /* EBLR */
+ case 0x48: /* EBLR (OMAP2) */
s->eblr = value & 0xff;
break;
+ case 0x4C: /* OSC_12M_SEL (OMAP1) */
+ s->clksel = value & 1;
+ break;
case 0x44: /* SSR */
case 0x50: /* MVR */
- case 0x58: /* SYSS */
+ case 0x58: /* SYSS (OMAP2) */
OMAP_RO_REG(addr);
break;
- case 0x54: /* SYSC */
+ case 0x54: /* SYSC (OMAP2) */
s->syscontrol = value & 0x1d;
if (value & 2)
omap_uart_reset(s);
break;
- case 0x5c: /* WER */
+ case 0x5c: /* WER (OMAP2) */
s->wkup = value & 0x7f;
break;
- case 0x60: /* CFPS */
+ case 0x60: /* CFPS (OMAP2) */
s->cfps = value & 0xff;
break;
default:
reply other threads:[~2008-12-07 12:49 UTC|newest]
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