From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1L9OZd-0005DT-P6 for qemu-devel@nongnu.org; Sun, 07 Dec 2008 13:41:45 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1L9OZc-0005C1-Vf for qemu-devel@nongnu.org; Sun, 07 Dec 2008 13:41:45 -0500 Received: from [199.232.76.173] (port=51940 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1L9OZc-0005BV-Ir for qemu-devel@nongnu.org; Sun, 07 Dec 2008 13:41:44 -0500 Received: from savannah.gnu.org ([199.232.41.3]:46105 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1L9OZb-0003jd-Ul for qemu-devel@nongnu.org; Sun, 07 Dec 2008 13:41:44 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1L9OZb-0007d4-CW for qemu-devel@nongnu.org; Sun, 07 Dec 2008 18:41:43 +0000 Received: from balrog by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1L9OZb-0007d0-2v for qemu-devel@nongnu.org; Sun, 07 Dec 2008 18:41:43 +0000 MIME-Version: 1.0 Errors-To: balrog Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Andrzej Zaborowski Message-Id: Date: Sun, 07 Dec 2008 18:41:43 +0000 Subject: [Qemu-devel] [5924] sh4: mmio based CF support on r2d board (Takashi YOSHII). Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 5924 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5924 Author: balrog Date: 2008-12-07 18:41:42 +0000 (Sun, 07 Dec 2008) Log Message: ----------- sh4: mmio based CF support on r2d board (Takashi YOSHII). This patch adds emulation for a CompactFlash on sh4/r2d board. The device is CF, but wired to be worked as True-IDE mode, and connected directly to SH bus. So, this code is to support generally mmio based IDEs which are supported by "pata_platform" driver in linux kernel. Signed-off-by: Takashi YOSHII Signed-off-by: Andrzej Zaborowski Modified Paths: -------------- trunk/Makefile.target trunk/hw/ide.c trunk/hw/r2d.c trunk/hw/sh.h Modified: trunk/Makefile.target =================================================================== --- trunk/Makefile.target 2008-12-07 18:15:54 UTC (rev 5923) +++ trunk/Makefile.target 2008-12-07 18:41:42 UTC (rev 5924) @@ -711,6 +711,7 @@ ifeq ($(TARGET_BASE_ARCH), sh4) OBJS+= shix.o r2d.o sh7750.o sh7750_regnames.o tc58128.o OBJS+= sh_timer.o ptimer.o sh_serial.o sh_intc.o sm501.o serial.o +OBJS+= ide.o endif ifeq ($(TARGET_BASE_ARCH), m68k) OBJS+= an5206.o mcf5206.o ptimer.o mcf_uart.o mcf_intc.o mcf5208.o mcf_fec.o Modified: trunk/hw/ide.c =================================================================== --- trunk/hw/ide.c 2008-12-07 18:15:54 UTC (rev 5923) +++ trunk/hw/ide.c 2008-12-07 18:41:42 UTC (rev 5924) @@ -3414,6 +3414,98 @@ } /***********************************************************/ +/* MMIO based ide port + * This emulates IDE device connected directly to the CPU bus without + * dedicated ide controller, which is often seen on embedded boards. + */ + +typedef struct { + void *dev; + int shift; +} MMIOState; + +static uint32_t mmio_ide_read (void *opaque, target_phys_addr_t addr) +{ + MMIOState *s = (MMIOState*)opaque; + IDEState *ide = (IDEState*)s->dev; + addr >>= s->shift; + if (addr & 7) + return ide_ioport_read(ide, addr); + else + return ide_data_readw(ide, 0); +} + +static void mmio_ide_write (void *opaque, target_phys_addr_t addr, + uint32_t val) +{ + MMIOState *s = (MMIOState*)opaque; + IDEState *ide = (IDEState*)s->dev; + addr >>= s->shift; + if (addr & 7) + ide_ioport_write(ide, addr, val); + else + ide_data_writew(ide, 0, val); +} + +static CPUReadMemoryFunc *mmio_ide_reads[] = { + mmio_ide_read, + mmio_ide_read, + mmio_ide_read, +}; + +static CPUWriteMemoryFunc *mmio_ide_writes[] = { + mmio_ide_write, + mmio_ide_write, + mmio_ide_write, +}; + +static uint32_t mmio_ide_status_read (void *opaque, target_phys_addr_t addr) +{ + MMIOState *s= (MMIOState*)opaque; + IDEState *ide = (IDEState*)s->dev; + return ide_status_read(ide, 0); +} + +static void mmio_ide_cmd_write (void *opaque, target_phys_addr_t addr, + uint32_t val) +{ + MMIOState *s = (MMIOState*)opaque; + IDEState *ide = (IDEState*)s->dev; + ide_cmd_write(ide, 0, val); +} + +static CPUReadMemoryFunc *mmio_ide_status[] = { + mmio_ide_status_read, + mmio_ide_status_read, + mmio_ide_status_read, +}; + +static CPUWriteMemoryFunc *mmio_ide_cmd[] = { + mmio_ide_cmd_write, + mmio_ide_cmd_write, + mmio_ide_cmd_write, +}; + +void mmio_ide_init (target_phys_addr_t membase, target_phys_addr_t membase2, + qemu_irq irq, int shift, + BlockDriverState *hd0, BlockDriverState *hd1) +{ + MMIOState *s = qemu_mallocz(sizeof(MMIOState)); + IDEState *ide = qemu_mallocz(sizeof(IDEState) * 2); + int mem1, mem2; + + ide_init2(ide, hd0, hd1, irq); + + s->dev = ide; + s->shift = shift; + + mem1 = cpu_register_io_memory(0, mmio_ide_reads, mmio_ide_writes, s); + mem2 = cpu_register_io_memory(0, mmio_ide_status, mmio_ide_cmd, s); + cpu_register_physical_memory(membase, 16 << shift, mem1); + cpu_register_physical_memory(membase2, 2 << shift, mem2); +} + +/***********************************************************/ /* CF-ATA Microdrive */ #define METADATA_SIZE 0x20 Modified: trunk/hw/r2d.c =================================================================== --- trunk/hw/r2d.c 2008-12-07 18:15:54 UTC (rev 5923) +++ trunk/hw/r2d.c 2008-12-07 18:41:42 UTC (rev 5924) @@ -149,6 +149,11 @@ sm501_vga_ram_addr = qemu_ram_alloc(SM501_VRAM_SIZE); sm501_init(ds, 0x10000000, sm501_vga_ram_addr, SM501_VRAM_SIZE, serial_hds[2]); + + /* onboard CF (True IDE mode, Master only). */ + mmio_ide_init(0x14001000, 0x1400080c, NULL, 1, + drives_table[drive_get_index(IF_IDE, 0, 0)].bdrv, NULL); + /* Todo: register on board registers */ { int kernel_size; Modified: trunk/hw/sh.h =================================================================== --- trunk/hw/sh.h 2008-12-07 18:15:54 UTC (rev 5923) +++ trunk/hw/sh.h 2008-12-07 18:41:42 UTC (rev 5924) @@ -45,4 +45,8 @@ /* tc58128.c */ int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2); +/* ide.c */ +void mmio_ide_init(target_phys_addr_t membase, target_phys_addr_t membase2, + qemu_irq irq, int shift, + BlockDriverState *hd0, BlockDriverState *hd1); #endif