From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1L9P46-0005to-VZ for qemu-devel@nongnu.org; Sun, 07 Dec 2008 14:13:15 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1L9P46-0005tN-7l for qemu-devel@nongnu.org; Sun, 07 Dec 2008 14:13:14 -0500 Received: from [199.232.76.173] (port=35515 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1L9P45-0005tK-Vi for qemu-devel@nongnu.org; Sun, 07 Dec 2008 14:13:14 -0500 Received: from savannah.gnu.org ([199.232.41.3]:44157 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1L9P45-0000AT-QF for qemu-devel@nongnu.org; Sun, 07 Dec 2008 14:13:13 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1L9P45-0000pS-3p for qemu-devel@nongnu.org; Sun, 07 Dec 2008 19:13:13 +0000 Received: from balrog by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1L9P44-0000pO-Pi for qemu-devel@nongnu.org; Sun, 07 Dec 2008 19:13:12 +0000 MIME-Version: 1.0 Errors-To: balrog Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Andrzej Zaborowski Message-Id: Date: Sun, 07 Dec 2008 19:13:12 +0000 Subject: [Qemu-devel] [5928] SH: Don't subtract bases from access addresses in PCIC. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 5928 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5928 Author: balrog Date: 2008-12-07 19:13:12 +0000 (Sun, 07 Dec 2008) Log Message: ----------- SH: Don't subtract bases from access addresses in PCIC. Modified Paths: -------------- trunk/hw/sh_pci.c Modified: trunk/hw/sh_pci.c =================================================================== --- trunk/hw/sh_pci.c 2008-12-07 19:08:45 UTC (rev 5927) +++ trunk/hw/sh_pci.c 2008-12-07 19:13:12 UTC (rev 5928) @@ -40,7 +40,6 @@ static void sh_pci_reg_write (void *p, target_phys_addr_t addr, uint32_t val) { SHPCIC *pcic = p; - addr -= pcic->regbase; switch(addr) { case 0 ... 0xfc: cpu_to_le32w((uint32_t*)(pcic->dev->config + addr), val); @@ -63,7 +62,6 @@ static uint32_t sh_pci_reg_read (void *p, target_phys_addr_t addr) { SHPCIC *pcic = p; - addr -= pcic->regbase; switch(addr) { case 0 ... 0xfc: return le32_to_cpup((uint32_t*)(pcic->dev->config + addr)); @@ -78,13 +76,13 @@ static void sh_pci_data_write (SHPCIC *pcic, target_phys_addr_t addr, uint32_t val, int size) { - pci_data_write(pcic->bus, addr - pcic->membase + pcic->mbr, val, size); + pci_data_write(pcic->bus, addr + pcic->mbr, val, size); } static uint32_t sh_pci_mem_read (SHPCIC *pcic, target_phys_addr_t addr, int size) { - return pci_data_read(pcic->bus, addr - pcic->membase + pcic->mbr, size); + return pci_data_read(pcic->bus, addr + pcic->mbr, size); } static void sh_pci_writeb (void *p, target_phys_addr_t addr, uint32_t val) @@ -119,7 +117,7 @@ static int sh_pci_addr2port(SHPCIC *pcic, target_phys_addr_t addr) { - return addr - pcic->iopbase + pcic->iobr; + return addr + pcic->iobr; } static void sh_pci_outb (void *p, target_phys_addr_t addr, uint32_t val)