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From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [5941] target-ppc: kill a few warnings
Date: Sun, 07 Dec 2008 23:00:00 +0000	[thread overview]
Message-ID: <E1L9SbY-0008Jr-G8@cvs.savannah.gnu.org> (raw)

Revision: 5941
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5941
Author:   aurel32
Date:     2008-12-07 23:00:00 +0000 (Sun, 07 Dec 2008)

Log Message:
-----------
target-ppc: kill a few warnings

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

Modified Paths:
--------------
    trunk/hw/ppc4xx_pci.c
    trunk/target-ppc/translate.c

Modified: trunk/hw/ppc4xx_pci.c
===================================================================
--- trunk/hw/ppc4xx_pci.c	2008-12-07 22:50:16 UTC (rev 5940)
+++ trunk/hw/ppc4xx_pci.c	2008-12-07 23:00:00 UTC (rev 5941)
@@ -21,6 +21,8 @@
  * 4xx SoCs, such as the 440EP. */
 
 #include "hw.h"
+#include "ppc.h"
+#include "ppc4xx.h"
 
 typedef target_phys_addr_t pci_addr_t;
 #include "pci.h"

Modified: trunk/target-ppc/translate.c
===================================================================
--- trunk/target-ppc/translate.c	2008-12-07 22:50:16 UTC (rev 5940)
+++ trunk/target-ppc/translate.c	2008-12-07 23:00:00 UTC (rev 5941)
@@ -3024,7 +3024,7 @@
 #endif
 /***                Integer load and store with byte reverse               ***/
 /* lhbrx */
-void always_inline gen_qemu_ld16ur(TCGv t0, TCGv t1, int flags)
+static void always_inline gen_qemu_ld16ur(TCGv t0, TCGv t1, int flags)
 {
     TCGv_i32 temp = tcg_temp_new_i32();
     gen_qemu_ld16u(t0, t1, flags);
@@ -3036,7 +3036,7 @@
 GEN_LDX(lhbr, ld16ur, 0x16, 0x18, PPC_INTEGER);
 
 /* lwbrx */
-void always_inline gen_qemu_ld32ur(TCGv t0, TCGv t1, int flags)
+static void always_inline gen_qemu_ld32ur(TCGv t0, TCGv t1, int flags)
 {
     TCGv_i32 temp = tcg_temp_new_i32();
     gen_qemu_ld32u(t0, t1, flags);
@@ -3048,7 +3048,7 @@
 GEN_LDX(lwbr, ld32ur, 0x16, 0x10, PPC_INTEGER);
 
 /* sthbrx */
-void always_inline gen_qemu_st16r(TCGv t0, TCGv t1, int flags)
+static void always_inline gen_qemu_st16r(TCGv t0, TCGv t1, int flags)
 {
     TCGv_i32 temp = tcg_temp_new_i32();
     TCGv t2 = tcg_temp_new();
@@ -3063,7 +3063,7 @@
 GEN_STX(sthbr, st16r, 0x16, 0x1C, PPC_INTEGER);
 
 /* stwbrx */
-void always_inline gen_qemu_st32r(TCGv t0, TCGv t1, int flags)
+static void always_inline gen_qemu_st32r(TCGv t0, TCGv t1, int flags)
 {
     TCGv_i32 temp = tcg_temp_new_i32();
     TCGv t2 = tcg_temp_new();

                 reply	other threads:[~2008-12-07 23:00 UTC|newest]

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