From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LCMfQ-0001yy-Bg for qemu-devel@nongnu.org; Mon, 15 Dec 2008 18:16:00 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LCMfP-0001yV-NL for qemu-devel@nongnu.org; Mon, 15 Dec 2008 18:15:59 -0500 Received: from [199.232.76.173] (port=32876 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LCMfP-0001yS-JQ for qemu-devel@nongnu.org; Mon, 15 Dec 2008 18:15:59 -0500 Received: from savannah.gnu.org ([199.232.41.3]:41567 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LCMfP-0001Ve-7F for qemu-devel@nongnu.org; Mon, 15 Dec 2008 18:15:59 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1LCMfN-0003Lc-R0 for qemu-devel@nongnu.org; Mon, 15 Dec 2008 23:15:58 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1LCMfN-0003LV-4j for qemu-devel@nongnu.org; Mon, 15 Dec 2008 23:15:57 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Mon, 15 Dec 2008 23:15:57 +0000 Subject: [Qemu-devel] [6063] target-ppc: create a helper function to allow more flexible RAM allocation for PPC 4xx Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 6063 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6063 Author: aurel32 Date: 2008-12-15 23:15:56 +0000 (Mon, 15 Dec 2008) Log Message: ----------- target-ppc: create a helper function to allow more flexible RAM allocation for PPC 4xx The 4xx SDRAM controller supports a small number of banks, and each bank must be one of a small set of sizes. The number of banks and the supported sizes varies by SoC. This function uses the user-specified RAM size to fill in the "ram_bases" and "ram_sizes" arrays required by ppc4xx_sdram_init(). Signed-off-by: Hollis Blanchard Signed-off-by: Aurelien Jarno Modified Paths: -------------- trunk/hw/ppc4xx.h trunk/hw/ppc4xx_devs.c Modified: trunk/hw/ppc4xx.h =================================================================== --- trunk/hw/ppc4xx.h 2008-12-15 22:59:45 UTC (rev 6062) +++ trunk/hw/ppc4xx.h 2008-12-15 23:15:56 UTC (rev 6063) @@ -48,6 +48,11 @@ qemu_irq *ppcuic_init (CPUState *env, qemu_irq *irqs, uint32_t dcr_base, int has_ssr, int has_vr); +ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks, + target_phys_addr_t ram_bases[], + target_phys_addr_t ram_sizes[], + const unsigned int sdram_bank_sizes[]); + void ppc4xx_sdram_init (CPUState *env, qemu_irq irq, int nbanks, target_phys_addr_t *ram_bases, target_phys_addr_t *ram_sizes, Modified: trunk/hw/ppc4xx_devs.c =================================================================== --- trunk/hw/ppc4xx_devs.c 2008-12-15 22:59:45 UTC (rev 6062) +++ trunk/hw/ppc4xx_devs.c 2008-12-15 23:15:56 UTC (rev 6063) @@ -873,3 +873,45 @@ sdram_map_bcr(sdram); } } + +/* Fill in consecutive SDRAM banks with 'ram_size' bytes of memory. + * + * sdram_bank_sizes[] must be 0-terminated. + * + * The 4xx SDRAM controller supports a small number of banks, and each bank + * must be one of a small set of sizes. The number of banks and the supported + * sizes varies by SoC. */ +ram_addr_t ppc4xx_sdram_adjust(ram_addr_t ram_size, int nr_banks, + target_phys_addr_t ram_bases[], + target_phys_addr_t ram_sizes[], + const unsigned int sdram_bank_sizes[]) +{ + ram_addr_t ram_end = 0; + int i; + int j; + + for (i = 0; i < nr_banks; i++) { + for (j = 0; sdram_bank_sizes[j] != 0; j++) { + unsigned int bank_size = sdram_bank_sizes[j]; + + if (bank_size <= ram_size) { + ram_bases[i] = ram_end; + ram_sizes[i] = bank_size; + ram_end += bank_size; + ram_size -= bank_size; + break; + } + } + + if (!ram_size) { + /* No need to use the remaining banks. */ + break; + } + } + + if (ram_size) + printf("Truncating memory to %d MiB to fit SDRAM controller limits.\n", + (int)(ram_end >> 20)); + + return ram_end; +}