From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LCXPN-0000eK-Co for qemu-devel@nongnu.org; Tue, 16 Dec 2008 05:44:09 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LCXPM-0000dk-M5 for qemu-devel@nongnu.org; Tue, 16 Dec 2008 05:44:08 -0500 Received: from [199.232.76.173] (port=46645 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LCXPM-0000df-9V for qemu-devel@nongnu.org; Tue, 16 Dec 2008 05:44:08 -0500 Received: from savannah.gnu.org ([199.232.41.3]:41776 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LCXPL-0006U1-SW for qemu-devel@nongnu.org; Tue, 16 Dec 2008 05:44:08 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1LCXPL-0006KS-29 for qemu-devel@nongnu.org; Tue, 16 Dec 2008 10:44:07 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1LCXPK-0006KO-Ol for qemu-devel@nongnu.org; Tue, 16 Dec 2008 10:44:06 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Tue, 16 Dec 2008 10:44:06 +0000 Subject: [Qemu-devel] [6066] target-ppc: PowerPC 440EP SoC emulation Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 6066 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6066 Author: aurel32 Date: 2008-12-16 10:44:06 +0000 (Tue, 16 Dec 2008) Log Message: ----------- target-ppc: PowerPC 440EP SoC emulation Wire up the system-on-chip devices present on 440EP chips. This patch is a little unusual in that qemu doesn't actually emulate the 440 core, but we use this board code with KVM (which does). If/when 440 core emulation is supported, the kvm_enabled() hack can be removed. Signed-off-by: Hollis Blanchard Signed-off-by: Aurelien Jarno Modified Paths: -------------- trunk/Makefile.target Added Paths: ----------- trunk/hw/ppc440.c trunk/hw/ppc440.h Modified: trunk/Makefile.target =================================================================== --- trunk/Makefile.target 2008-12-16 10:43:58 UTC (rev 6065) +++ trunk/Makefile.target 2008-12-16 10:44:06 UTC (rev 6066) @@ -655,6 +655,7 @@ OBJS+= unin_pci.o ppc_chrp.o # PowerPC 4xx boards OBJS+= pflash_cfi02.o ppc4xx_devs.o ppc4xx_pci.o ppc405_uc.o ppc405_boards.o +OBJS+= ppc440.o ifdef FDT_LIBS OBJS+= device_tree.o LIBS+= $(FDT_LIBS) Added: trunk/hw/ppc440.c =================================================================== --- trunk/hw/ppc440.c (rev 0) +++ trunk/hw/ppc440.c 2008-12-16 10:44:06 UTC (rev 6066) @@ -0,0 +1,103 @@ +/* + * Qemu PowerPC 440 chip emulation + * + * Copyright 2007 IBM Corporation. + * Authors: + * Jerone Young + * Christian Ehrhardt + * Hollis Blanchard + * + * This work is licensed under the GNU GPL license version 2 or later. + * + */ + +#include "hw.h" +#include "isa.h" +#include "ppc.h" +#include "ppc4xx.h" +#include "ppc440.h" +#include "ppc405.h" +#include "sysemu.h" +#include "kvm.h" + +#define PPC440EP_PCI_CONFIG 0xeec00000 +#define PPC440EP_PCI_INTACK 0xeed00000 +#define PPC440EP_PCI_SPECIAL 0xeed00000 +#define PPC440EP_PCI_REGS 0xef400000 +#define PPC440EP_PCI_IO 0xe8000000 +#define PPC440EP_PCI_IOLEN 0x00010000 + +#define PPC440EP_SDRAM_NR_BANKS 4 + +static const unsigned int ppc440ep_sdram_bank_sizes[] = { + 256<<20, 128<<20, 64<<20, 32<<20, 16<<20, 8<<20, 0 +}; + +CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip, + const unsigned int pci_irq_nrs[4], int do_init) +{ + target_phys_addr_t ram_bases[PPC440EP_SDRAM_NR_BANKS]; + target_phys_addr_t ram_sizes[PPC440EP_SDRAM_NR_BANKS]; + CPUState *env; + ppc4xx_mmio_t *mmio; + qemu_irq *pic; + qemu_irq *irqs; + qemu_irq *pci_irqs; + + env = cpu_ppc_init("440EP"); + if (!env && kvm_enabled()) { + /* XXX Since qemu doesn't yet emulate 440, we just say it's a 405. + * Since KVM doesn't use qemu's CPU emulation it seems to be working + * OK. */ + env = cpu_ppc_init("405"); + } + if (!env) { + fprintf(stderr, "Unable to initialize CPU!\n"); + exit(1); + } + + ppc_dcr_init(env, NULL, NULL); + + /* interrupt controller */ + irqs = qemu_mallocz(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB); + irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]; + irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT]; + pic = ppcuic_init(env, irqs, 0x0C0, 0, 1); + + /* SDRAM controller */ + memset(ram_bases, 0, sizeof(ram_bases)); + memset(ram_sizes, 0, sizeof(ram_sizes)); + *ram_size = ppc4xx_sdram_adjust(*ram_size, PPC440EP_SDRAM_NR_BANKS, + ram_bases, ram_sizes, + ppc440ep_sdram_bank_sizes); + /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */ + ppc4xx_sdram_init(env, pic[14], PPC440EP_SDRAM_NR_BANKS, ram_bases, + ram_sizes, do_init); + + /* PCI */ + pci_irqs = qemu_malloc(sizeof(qemu_irq) * 4); + pci_irqs[0] = pic[pci_irq_nrs[0]]; + pci_irqs[1] = pic[pci_irq_nrs[1]]; + pci_irqs[2] = pic[pci_irq_nrs[2]]; + pci_irqs[3] = pic[pci_irq_nrs[3]]; + *pcip = ppc4xx_pci_init(env, pci_irqs, + PPC440EP_PCI_CONFIG, + PPC440EP_PCI_INTACK, + PPC440EP_PCI_SPECIAL, + PPC440EP_PCI_REGS); + if (!*pcip) + printf("couldn't create PCI controller!\n"); + + isa_mmio_init(PPC440EP_PCI_IO, PPC440EP_PCI_IOLEN); + + /* MMIO -- most "miscellaneous" devices live above 0xef600000. */ + mmio = ppc4xx_mmio_init(env, 0xef600000); + + if (serial_hds[0]) + ppc405_serial_init(env, mmio, 0x300, pic[0], serial_hds[0]); + + if (serial_hds[1]) + ppc405_serial_init(env, mmio, 0x400, pic[1], serial_hds[1]); + + return env; +} Added: trunk/hw/ppc440.h =================================================================== --- trunk/hw/ppc440.h (rev 0) +++ trunk/hw/ppc440.h 2008-12-16 10:44:06 UTC (rev 6066) @@ -0,0 +1,20 @@ +/* + * Qemu PowerPC 440 board emualtion + * + * Copyright 2007 IBM Corporation. + * Authors: Jerone Young + * Christian Ehrhardt + * + * This work is licensed under the GNU GPL licence version 2 or later + * + */ + +#ifndef QEMU_PPC440_H +#define QEMU_PPC440_H + +#include "hw.h" + +CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip, + const unsigned int pci_irq_nrs[4], int do_init); + +#endif