From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LDRa8-00007K-Sr for qemu-devel@nongnu.org; Thu, 18 Dec 2008 17:43:00 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LDRa8-00006t-Fl for qemu-devel@nongnu.org; Thu, 18 Dec 2008 17:43:00 -0500 Received: from [199.232.76.173] (port=59856 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LDRa8-00006n-34 for qemu-devel@nongnu.org; Thu, 18 Dec 2008 17:43:00 -0500 Received: from savannah.gnu.org ([199.232.41.3]:43664 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LDRa7-00080X-PS for qemu-devel@nongnu.org; Thu, 18 Dec 2008 17:42:59 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1LDRa7-0002N3-Ae for qemu-devel@nongnu.org; Thu, 18 Dec 2008 22:42:59 +0000 Received: from aurel32 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1LDRa7-0002Mz-2q for qemu-devel@nongnu.org; Thu, 18 Dec 2008 22:42:59 +0000 MIME-Version: 1.0 Errors-To: aurel32 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Aurelien Jarno Message-Id: Date: Thu, 18 Dec 2008 22:42:59 +0000 Subject: [Qemu-devel] [6087] target-ppc: add Altivec logical operations Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 6087 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6087 Author: aurel32 Date: 2008-12-18 22:42:58 +0000 (Thu, 18 Dec 2008) Log Message: ----------- target-ppc: add Altivec logical operations Use opc2/opc3 instead of one big xo field. Do this consistency with the rest of translate.c Signed-off-by: Nathan Froyd Signed-off-by: Aurelien Jarno Modified Paths: -------------- trunk/target-ppc/translate.c Modified: trunk/target-ppc/translate.c =================================================================== --- trunk/target-ppc/translate.c 2008-12-18 22:42:51 UTC (rev 6086) +++ trunk/target-ppc/translate.c 2008-12-18 22:42:58 UTC (rev 6087) @@ -6139,6 +6139,24 @@ /* As we don't emulate the cache, stvxl is stricly equivalent to stvx */ GEN_VR_STX(svxl, 0x07, 0x0F); +/* Logical operations */ +#define GEN_VX_LOGICAL(name, tcg_op, opc2, opc3) \ +GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \ +{ \ + if (unlikely(!ctx->altivec_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VPU); \ + return; \ + } \ + tcg_op(cpu_avrh[rD(ctx->opcode)], cpu_avrh[rA(ctx->opcode)], cpu_avrh[rB(ctx->opcode)]); \ + tcg_op(cpu_avrl[rD(ctx->opcode)], cpu_avrl[rA(ctx->opcode)], cpu_avrl[rB(ctx->opcode)]); \ +} + +GEN_VX_LOGICAL(vand, tcg_gen_and_i64, 2, 16); +GEN_VX_LOGICAL(vandc, tcg_gen_andc_i64, 2, 17); +GEN_VX_LOGICAL(vor, tcg_gen_or_i64, 2, 18); +GEN_VX_LOGICAL(vxor, tcg_gen_xor_i64, 2, 19); +GEN_VX_LOGICAL(vnor, tcg_gen_nor_i64, 2, 20); + /*** SPE extension ***/ /* Register moves */