From: Blue Swirl <blauwirbel@gmail.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [6123] Better SuperSPARC emulation (Robert Reif)
Date: Tue, 23 Dec 2008 15:06:36 +0000 [thread overview]
Message-ID: <E1LF8qC-0002OX-B0@cvs.savannah.gnu.org> (raw)
Revision: 6123
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6123
Author: blueswir1
Date: 2008-12-23 15:06:35 +0000 (Tue, 23 Dec 2008)
Log Message:
-----------
Better SuperSPARC emulation (Robert Reif)
Modified Paths:
--------------
trunk/target-sparc/cpu.h
trunk/target-sparc/helper.c
Modified: trunk/target-sparc/cpu.h
===================================================================
--- trunk/target-sparc/cpu.h 2008-12-23 08:47:26 UTC (rev 6122)
+++ trunk/target-sparc/cpu.h 2008-12-23 15:06:35 UTC (rev 6123)
@@ -210,6 +210,7 @@
uint32_t mmu_cxr_mask;
uint32_t mmu_sfsr_mask;
uint32_t mmu_trcr_mask;
+ uint32_t mxcc_version;
uint32_t features;
uint32_t nwindows;
uint32_t maxtl;
Modified: trunk/target-sparc/helper.c
===================================================================
--- trunk/target-sparc/helper.c 2008-12-23 08:47:26 UTC (rev 6122)
+++ trunk/target-sparc/helper.c 2008-12-23 15:06:35 UTC (rev 6123)
@@ -688,6 +688,7 @@
#if !defined(TARGET_SPARC64)
env->mmuregs[0] |= def->mmu_version;
cpu_sparc_set_id(env, 0);
+ env->mxccregs[7] |= def->mxcc_version;
#else
env->mmu_version = def->mmu_version;
env->maxtl = def->maxtl;
@@ -972,19 +973,6 @@
CPU_FEATURE_FSMULD,
},
{
- .name = "TI SuperSparc II",
- .iu_version = 0x40000000,
- .fpu_version = 0 << 17,
- .mmu_version = 0x04000000,
- .mmu_bm = 0x00002000,
- .mmu_ctpr_mask = 0xffffffc0,
- .mmu_cxr_mask = 0x0000ffff,
- .mmu_sfsr_mask = 0xffffffff,
- .mmu_trcr_mask = 0xffffffff,
- .nwindows = 8,
- .features = CPU_DEFAULT_FEATURES,
- },
- {
.name = "TI MicroSparc I",
.iu_version = 0x41000000,
.fpu_version = 4 << 17,
@@ -1027,9 +1015,9 @@
},
{
.name = "TI SuperSparc 40", // STP1020NPGA
- .iu_version = 0x41000000,
+ .iu_version = 0x41000000, // SuperSPARC 2.x
.fpu_version = 0 << 17,
- .mmu_version = 0x00000000,
+ .mmu_version = 0x00000800, // SuperSPARC 2.x, no MXCC
.mmu_bm = 0x00002000,
.mmu_ctpr_mask = 0xffffffc0,
.mmu_cxr_mask = 0x0000ffff,
@@ -1040,9 +1028,9 @@
},
{
.name = "TI SuperSparc 50", // STP1020PGA
- .iu_version = 0x40000000,
+ .iu_version = 0x40000000, // SuperSPARC 3.x
.fpu_version = 0 << 17,
- .mmu_version = 0x04000000,
+ .mmu_version = 0x01000800, // SuperSPARC 3.x, no MXCC
.mmu_bm = 0x00002000,
.mmu_ctpr_mask = 0xffffffc0,
.mmu_cxr_mask = 0x0000ffff,
@@ -1053,22 +1041,23 @@
},
{
.name = "TI SuperSparc 51",
- .iu_version = 0x43000000,
+ .iu_version = 0x40000000, // SuperSPARC 3.x
.fpu_version = 0 << 17,
- .mmu_version = 0x04000000,
+ .mmu_version = 0x01000000, // SuperSPARC 3.x, MXCC
.mmu_bm = 0x00002000,
.mmu_ctpr_mask = 0xffffffc0,
.mmu_cxr_mask = 0x0000ffff,
.mmu_sfsr_mask = 0xffffffff,
.mmu_trcr_mask = 0xffffffff,
+ .mxcc_version = 0x00000104,
.nwindows = 8,
.features = CPU_DEFAULT_FEATURES,
},
{
.name = "TI SuperSparc 60", // STP1020APGA
- .iu_version = 0x40000000,
+ .iu_version = 0x40000000, // SuperSPARC 3.x
.fpu_version = 0 << 17,
- .mmu_version = 0x03000000,
+ .mmu_version = 0x01000800, // SuperSPARC 3.x, no MXCC
.mmu_bm = 0x00002000,
.mmu_ctpr_mask = 0xffffffc0,
.mmu_cxr_mask = 0x0000ffff,
@@ -1079,18 +1068,33 @@
},
{
.name = "TI SuperSparc 61",
- .iu_version = 0x44000000,
+ .iu_version = 0x44000000, // SuperSPARC 3.x
.fpu_version = 0 << 17,
- .mmu_version = 0x04000000,
+ .mmu_version = 0x01000000, // SuperSPARC 3.x, MXCC
.mmu_bm = 0x00002000,
.mmu_ctpr_mask = 0xffffffc0,
.mmu_cxr_mask = 0x0000ffff,
.mmu_sfsr_mask = 0xffffffff,
.mmu_trcr_mask = 0xffffffff,
+ .mxcc_version = 0x00000104,
.nwindows = 8,
.features = CPU_DEFAULT_FEATURES,
},
{
+ .name = "TI SuperSparc II",
+ .iu_version = 0x40000000, // SuperSPARC II 1.x
+ .fpu_version = 0 << 17,
+ .mmu_version = 0x08000000, // SuperSPARC II 1.x, MXCC
+ .mmu_bm = 0x00002000,
+ .mmu_ctpr_mask = 0xffffffc0,
+ .mmu_cxr_mask = 0x0000ffff,
+ .mmu_sfsr_mask = 0xffffffff,
+ .mmu_trcr_mask = 0xffffffff,
+ .mxcc_version = 0x00000104,
+ .nwindows = 8,
+ .features = CPU_DEFAULT_FEATURES,
+ },
+ {
.name = "Ross RT625",
.iu_version = 0x1e000000,
.fpu_version = 1 << 17,
reply other threads:[~2008-12-23 15:06 UTC|newest]
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