[Qemu-devel] [6209] ETRAX: Correct size of control-register area.

[Qemu-devel] [6209] ETRAX: Correct size of control-register area.

[Edgar E. Iglesias]

Revision: 6209
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6209
Author:   edgar_igl
Date:     2009-01-07 14:00:33 +0000 (Wed, 07 Jan 2009)

Log Message:
-----------
ETRAX: Correct size of control-register area.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>

Modified Paths:
--------------
    trunk/hw/etraxfs_eth.c

Modified: trunk/hw/etraxfs_eth.c
===================================================================
--- trunk/hw/etraxfs_eth.c	2009-01-07 13:46:31 UTC (rev 6208)
+++ trunk/hw/etraxfs_eth.c	2009-01-07 14:00:33 UTC (rev 6209)
@@ -297,18 +297,18 @@
 /* ETRAX-FS Ethernet MAC block starts here.  */
 
 #define RW_MA0_LO	  0x00
-#define RW_MA0_HI	  0x04
-#define RW_MA1_LO	  0x08
-#define RW_MA1_HI	  0x0c
-#define RW_GA_LO	  0x10
-#define RW_GA_HI	  0x14
-#define RW_GEN_CTRL	  0x18
-#define RW_REC_CTRL	  0x1c
-#define RW_TR_CTRL	  0x20
-#define RW_CLR_ERR	  0x24
-#define RW_MGM_CTRL	  0x28
-#define R_STAT		  0x2c
-#define FS_ETH_MAX_REGS	  0x5c
+#define RW_MA0_HI	  0x01
+#define RW_MA1_LO	  0x02
+#define RW_MA1_HI	  0x03
+#define RW_GA_LO	  0x04
+#define RW_GA_HI	  0x05
+#define RW_GEN_CTRL	  0x06
+#define RW_REC_CTRL	  0x07
+#define RW_TR_CTRL	  0x08
+#define RW_CLR_ERR	  0x09
+#define RW_MGM_CTRL	  0x0a
+#define R_STAT		  0x0b
+#define FS_ETH_MAX_REGS	  0x17
 
 struct fs_eth
 {
@@ -360,42 +360,25 @@
 	}
 }
 
-static uint32_t eth_rinvalid (void *opaque, target_phys_addr_t addr)
-{
-	struct fs_eth *eth = opaque;
-	CPUState *env = eth->env;
-	cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n",
-		  addr);
-	return 0;
-}
-
 static uint32_t eth_readl (void *opaque, target_phys_addr_t addr)
 {
 	struct fs_eth *eth = opaque;
 	uint32_t r = 0;
 
+	addr >>= 2;
+
 	switch (addr) {
 		case R_STAT:
-			/* Attach an MDIO/PHY abstraction.  */
 			r = eth->mdio_bus.mdio & 1;
 			break;
 	default:
 		r = eth->regs[addr];
-		D(printf ("%s %x\n", __func__, addr));
+		D(printf ("%s %x\n", __func__, addr * 4));
 		break;
 	}
 	return r;
 }
 
-static void
-eth_winvalid (void *opaque, target_phys_addr_t addr, uint32_t value)
-{
-	struct fs_eth *eth = opaque;
-	CPUState *env = eth->env;
-	cpu_abort(env, "Unsupported short access. reg=" TARGET_FMT_plx "\n",
-		  addr);
-}
-
 static void eth_update_ma(struct fs_eth *eth, int ma)
 {
 	int reg;
@@ -425,20 +408,15 @@
 {
 	struct fs_eth *eth = opaque;
 
+	addr >>= 2;
 	switch (addr)
 	{
 		case RW_MA0_LO:
-			eth->regs[addr] = value;
-			eth_update_ma(eth, 0);
-			break;
 		case RW_MA0_HI:
 			eth->regs[addr] = value;
 			eth_update_ma(eth, 0);
 			break;
 		case RW_MA1_LO:
-			eth->regs[addr] = value;
-			eth_update_ma(eth, 1);
-			break;
 		case RW_MA1_HI:
 			eth->regs[addr] = value;
 			eth_update_ma(eth, 1);
@@ -553,14 +531,12 @@
 }
 
 static CPUReadMemoryFunc *eth_read[] = {
-	&eth_rinvalid,
-	&eth_rinvalid,
+	NULL, NULL,
 	&eth_readl,
 };
 
 static CPUWriteMemoryFunc *eth_write[] = {
-	&eth_winvalid,
-	&eth_winvalid,
+	NULL, NULL,
 	&eth_writel,
 };