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From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Sat, 24 Jan 2009 15:08:01 +0000
Subject: [Qemu-devel] [6423] target-ppc: Add float register read/write using
	XML
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Revision: 6423
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6423
Author:   aurel32
Date:     2009-01-24 15:08:00 +0000 (Sat, 24 Jan 2009)

Log Message:
-----------
target-ppc: Add float register read/write using XML

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

Modified Paths:
--------------
    trunk/target-ppc/translate_init.c

Modified: trunk/target-ppc/translate_init.c
===================================================================
--- trunk/target-ppc/translate_init.c	2009-01-24 15:07:50 UTC (rev 6422)
+++ trunk/target-ppc/translate_init.c	2009-01-24 15:08:00 UTC (rev 6423)
@@ -9272,6 +9272,33 @@
 }
 #endif
 
+static int gdb_get_float_reg(CPUState *env, uint8_t *mem_buf, int n)
+{
+    if (n < 32) {
+        stfq_p(mem_buf, env->fpr[n]);
+        return 8;
+    }
+    if (n == 32) {
+        /* FPSCR not implemented  */
+        memset(mem_buf, 0, 4);
+        return 4;
+    }
+    return 0;
+}
+
+static int gdb_set_float_reg(CPUState *env, uint8_t *mem_buf, int n)
+{
+    if (n < 32) {
+        env->fpr[n] = ldfq_p(mem_buf);
+        return 8;
+    }
+    if (n == 32) {
+        /* FPSCR not implemented  */
+        return 4;
+    }
+    return 0;
+}
+
 int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def)
 {
     env->msr_mask = def->msr_mask;
@@ -9284,6 +9311,11 @@
     if (create_ppc_opcodes(env, def) < 0)
         return -1;
     init_ppc_proc(env, def);
+
+    if (def->insns_flags & PPC_FLOAT) {
+        gdb_register_coprocessor(env, gdb_get_float_reg, gdb_set_float_reg,
+                                 33, "power-fpu.xml", 0);
+    }
 #if defined(PPC_DUMP_CPU)
     {
         const char *mmu_model, *excp_model, *bus_model;