From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LSaHU-0000Bk-Sn for qemu-devel@nongnu.org; Thu, 29 Jan 2009 12:02:21 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LSaHT-0000AC-Te for qemu-devel@nongnu.org; Thu, 29 Jan 2009 12:02:20 -0500 Received: from [199.232.76.173] (port=59290 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LSaHT-00009s-C8 for qemu-devel@nongnu.org; Thu, 29 Jan 2009 12:02:19 -0500 Received: from savannah.gnu.org ([199.232.41.3]:49427 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LSaHS-0005kZ-LA for qemu-devel@nongnu.org; Thu, 29 Jan 2009 12:02:18 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1LSaHS-0006YC-52 for qemu-devel@nongnu.org; Thu, 29 Jan 2009 17:02:18 +0000 Received: from aliguori by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1LSaHR-0006Y8-SR for qemu-devel@nongnu.org; Thu, 29 Jan 2009 17:02:18 +0000 MIME-Version: 1.0 Errors-To: aliguori Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Anthony Liguori Message-Id: Date: Thu, 29 Jan 2009 17:02:17 +0000 Subject: [Qemu-devel] [6472] MTRR support on x86, part 2 (Carl-Daniel Hailfinger) Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 6472 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6472 Author: aliguori Date: 2009-01-29 17:02:17 +0000 (Thu, 29 Jan 2009) Log Message: ----------- MTRR support on x86, part 2 (Carl-Daniel Hailfinger) Load and save MTRR state together with machine state. Add support for the MTRRcap MSR which is used by the latest Bochs BIOS and some operating systems. Fix a typo in ext2_feature_name. With this patch, MTRR emulation should be good enough to not trigger any sanity checks in well behaved BIOS/kernel code. Some corner cases for BIOS/firmware usage remain to be implemented, but that can be deferred to another patch. Also, MTRR accesses on hardware not supporting MTRRs should cause #GP. That can be enforced by another patch as well. Signed-off-by: Carl-Daniel Hailfinger Signed-off-by: Anthony Liguori Modified Paths: -------------- trunk/target-i386/cpu.h trunk/target-i386/machine.c trunk/target-i386/op_helper.c Modified: trunk/target-i386/cpu.h =================================================================== --- trunk/target-i386/cpu.h 2009-01-29 17:02:13 UTC (rev 6471) +++ trunk/target-i386/cpu.h 2009-01-29 17:02:17 UTC (rev 6472) @@ -251,6 +251,11 @@ #define MSR_IA32_APICBASE_ENABLE (1<<11) #define MSR_IA32_APICBASE_BASE (0xfffff<<12) +#define MSR_MTRRcap 0xfe +#define MSR_MTRRcap_VCNT 8 +#define MSR_MTRRcap_FIXRANGE_SUPPORT (1 << 8) +#define MSR_MTRRcap_WC_SUPPORTED (1 << 10) + #define MSR_IA32_SYSENTER_CS 0x174 #define MSR_IA32_SYSENTER_ESP 0x175 #define MSR_IA32_SYSENTER_EIP 0x176 Modified: trunk/target-i386/machine.c =================================================================== --- trunk/target-i386/machine.c 2009-01-29 17:02:13 UTC (rev 6471) +++ trunk/target-i386/machine.c 2009-01-29 17:02:17 UTC (rev 6472) @@ -134,6 +134,15 @@ qemu_put_be16s(f, &env->intercept_dr_write); qemu_put_be32s(f, &env->intercept_exceptions); qemu_put_8s(f, &env->v_tpr); + + /* MTRRs */ + for(i = 0; i < 11; i++) + qemu_put_be64s(f, &env->mtrr_fixed[i]); + qemu_put_be64s(f, &env->mtrr_deftype); + for(i = 0; i < 8; i++) { + qemu_put_be64s(f, &env->mtrr_var[i].base); + qemu_put_be64s(f, &env->mtrr_var[i].mask); + } } #ifdef USE_X86LDOUBLE @@ -169,7 +178,7 @@ int32_t a20_mask; if (version_id != 3 && version_id != 4 && version_id != 5 - && version_id != 6 && version_id != 7) + && version_id != 6 && version_id != 7 && version_id != 8) return -EINVAL; for(i = 0; i < CPU_NB_REGS; i++) qemu_get_betls(f, &env->regs[i]); @@ -302,6 +311,18 @@ qemu_get_be32s(f, &env->intercept_exceptions); qemu_get_8s(f, &env->v_tpr); } + + if (version_id >= 8) { + /* MTRRs */ + for(i = 0; i < 11; i++) + qemu_get_be64s(f, &env->mtrr_fixed[i]); + qemu_get_be64s(f, &env->mtrr_deftype); + for(i = 0; i < 8; i++) { + qemu_get_be64s(f, &env->mtrr_var[i].base); + qemu_get_be64s(f, &env->mtrr_var[i].mask); + } + } + /* XXX: ensure compatiblity for halted bit ? */ /* XXX: compute redundant hflags bits */ env->hflags = hflags; Modified: trunk/target-i386/op_helper.c =================================================================== --- trunk/target-i386/op_helper.c 2009-01-29 17:02:13 UTC (rev 6471) +++ trunk/target-i386/op_helper.c 2009-01-29 17:02:17 UTC (rev 6472) @@ -3215,6 +3215,13 @@ case MSR_MTRRdefType: val = env->mtrr_deftype; break; + case MSR_MTRRcap: + if (env->cpuid_features & CPUID_MTRR) + val = MSR_MTRRcap_VCNT | MSR_MTRRcap_FIXRANGE_SUPPORT | MSR_MTRRcap_WC_SUPPORTED; + else + /* XXX: exception ? */ + val = 0; + break; default: /* XXX: exception ? */ val = 0;